| Which report |
subject to change |
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Proposal |
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| s |
Specification | |||
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Progress Report & IO Demonstration | |||
| Critical
Design Review Presentation |
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| f |
Final Report | |||
| Application Notes | ||||
| Final Presentation |
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| o |
o |
o |
o |
optional materials marked
with "o" |
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s |
i |
f |
title page title (plus a subtitle if the title is too cryptic) include names and preferred email addresses of all group members, no student IDs please <20 word summary of project list group number and preferred lab day and other lab days when available |
| s |
i |
Declaration of original
content All group members must sign and date their own signature. Other text should be typeset and included in your report. Hard copy of only this page may be submitted to the cmpe490 assignment box. If you choose to scan and submit this, then scan the whole page and have the original available on request. State: "The design elements of this project and report are entirely the original work of the authors and have not been submitted for credit in any other course except as follows:" provide a descriptive list of exceptions that reference your citations [], e.g. embedded processor core and UART provided by manufacturer [1] transcendental functions library used was [2] schematic in figure 3 was taken from reference [3] video frame buffer "vga.vhd" was modified from [4] ADC support circuitry was taken from the manufacturer's application notes [5] coefficients for motor PID controller are from [6] portions of the code in "controller.c" were previously submitted in course ECE 388. |
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| f |
Same as above, but the
declaration does not appear in your report. Hand it in
separately as hard copy to the assignment box. |
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s |
i |
f |
abstract (<250 words) highlight achievements - what did you do and what worked |
| p |
bonus: include a recent face
photo of each group member with name - all on one page cell phone photo or scan of a OneCard are fine. |
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i |
f |
table of contents | |
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s |
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functional requirements of project What is it supposed to do? backup plans or features to remove options/extensions |
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functional requirements of
project What is it supposed to do? Were those met? To what degree? Move options, extensions to Future Work |
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s |
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f |
design and description of
operation block diagrams of data flow can help out here From the specification on, I would expect sufficient detail so that if I gave the description to another group, they could build a project with similar behaviour. Show all algorithms and math that describe the behaviour. |
| p |
s |
i |
hardware requirements - what
do you need? interfaces estimate required capacities (e.g. Flash, RAM, FPGA logic elements /gates) proposed lab platform (Altera DE2 or other) Estimate calculations per second (multiply, {add, subtract, compare}) by task. Which tasks require a multiplier in the microcontroller and which require a hardware accelerator? Estimates could be verified through profiling code. |
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proposed parts order list,
supplier, cost include web links to supplier and datasheet |
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i |
f |
parts lists, description, most relevant spec (e.g. pixels, power), cost, order status (ordered before spec report, should all arrive shortly after submitting spec report and many weeks before IO demo) include web links to supplier and datasheet |
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s |
i |
f |
Describe and evaluate different available sources of reusable design units {open source software, device drivers, FPGA IP cores, opencores.org}: source size, compiled size, performance, resource requirements |
| p |
s |
i |
All IO signals Signal names, number of wires in buses; be as accurate as you can Indicate where each signal is found:
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Datasheet %%% performance, user block diagram Expand on the above to produce a datasheet of your complete embedded system. include calculated and measured power {peak, idle, standby as applicable} describe how each is calculated and measured |
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f |
Background Reading Search for articles that provide background helpful for your project {algorithms, designs, standards, etc.}. At least one article should be from a scholarly journal or conference. Suggest searching IEEE Xplore. From off-campus, use the library link. Describe the background information you found and comment on its utility for your project. |
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f |
Software design description block diagram of how processes interact, flow of data, other synchronization list any libraries or RTOS used |
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i |
f |
Test plan Software: test of hardware-independent software components software test benches test of hardware-dependent software components Check for "memory leaks" and other reliability issues. Measure free space after 5 and 30+ minutes of activity. Hardware: functional test procedure calibration/performance/characterization measurement procedures simulation and testbenches if appropriate |
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| o |
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f |
Results of experiments and
characterization:
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i |
Integrated circuit design
proposal - what will be included in the integrated circuit
designed below? %%% For CMPE 450 students, optional for CMPE 490 student |
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| f |
Integrated circuit design %%% For CMPE 450 students, optional for CMPE 490 student Take the VHDL code you have designed for your project, remove references to proprietary cores you don't have source code for, and synthesis, place, route and verify an integrated circuit. Prepared a datasheet. Compare to FPGA performance. Show conclusions of CAD logs, including verification {synthesis speed, power & size, P&R speed & size, LVS, DRC}. If the pin count turns out to be excessive, you can route a core without the pad frame. |
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s |
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old schedule with
annotations provide the schedule you submitted in the last report add comments (hand written or typed on each line) about completed tasks and explain schedule updates no penalty of course for missing your own targets honesty won't be held against you here -- this schedule exercise is for your benefit |
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| 3 |
5 |
7 |
new schedule ideally you have all your work broken down into many several hour tasks, but do your best after analyzing each old schedule, you can hopefully prepare a new more realistic schedule provide name of task, who will do it, start & finish dates, hours required, (leave a blank column for hours left for above) list at least N (at left) uncompleted tasks per group member (do not include course deadlines or submission preparation) as you progress, each task will become more finely subdivided |
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| s |
i |
f |
References (a.k.a. citations) Using someone else's work and forgetting to cite it is plagiarism and the penalties are harsh. textbooks, research papers, datasheets, applications notes, web pages, past projects Use IEEE format, pages 4-5. For materials obtained on the web, provide full URLs to the document. In case hyperlinks don't don't get translated to the PDF, spell out the URLs. Sometimes a URL to the parent page is useful. |
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| p |
s |
i |
f |
Weekly brief group minutes
must be submitted starting the day of the proposal
submission until final report is submitted.
Preferably, the minutes will be the body of the email, not
an attachment. No formatting required. These
should not go in the report. Send via email to repository and to all group members Email subject must start with group number, e.g. "g1" Rotate who takes minutes Minutes should include: Dates of work and casual meetings, who was present What each member achieved and whether the week's goals were achieved Goals for each member in the coming week Comments and suggestions by course instructor, lab instructor and TAs |
| Appendices |
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| f |
Quick start manual All instructions required to re-assemble project, connect IO to lab boards, configure and demonstrate. What do the buttons and switches do? Include file names of binary/configuration files which should all be in your source and binary archive submitted with your final report. Assume that the reader is familiar with Quartus, so brief descriptions such as "Program the FPGA with game.SOF" should be sufficient. Provide files and instructions for both .SOF and .POF routes to demonstrating the project. Ask yourself, is there anything Nancy or I need to know to demonstrate your project at open house? %%% |
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Future work Move and rewrite backup plans, options, extensions as Future Work. You have more great ideas that was possible to build, share these ideas with the next generation. |
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f |
Hardware documentation 1-page block diagram of hardware Full (hierarchical) schematics showing all components FPGA boards and other modules may be represented as one component. |
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| s |
i |
f |
source code section: If systems integration and testing is half the work, then arguably, most or all of your code needs to be written by half through the term. block diagram of interactions between processes (copy of diagram from software design, above) diagram: graphical hierarchy of source code (for each process if applicable) index to source code -- include a one-line
description of each file
-- indicate the status of
each source file as one of {Not compiled successfully, Compiled without
errors, Executed
or otherwise demonstrated, Tested and passed}, one letter
abbreviations are fine.
Include the following files in a compressed archive (e.g.
tar, zip). For the specification and progress report,
you have the option of including these files in the report
text.source code - documented, indented and readable embedded source code testbench source VHDL/Verilog source with testbenches if applicable simulation source if applicable any other design files (final report) all compiled binaries (software and FPGA configurations) |
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| f |
Self evaluation of group
members - hard copy only submitted separately Provide your proposal for how project marks should be distributed among group members (hopefully evenly). If the group does not agree on how this should be done, each group member should attach their own signed proposal, with justification and reference to the group meeting minutes. |
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| o |
o |
o |
o |
Feedback and comments to
instructor (optional) For final report, send separately |
Start early. The availability of your application notes for
other students to use during this term will be a
consideration in your mark. Application notes first
submitted in substantial form by the "early" due date will receive
a 20% bonus; 10% bonus for the middle deadline.
In the course of your project work, you will write code (C, C++,
VHDL, Verilog) that others may find useful, this year and in
subsequent years. You will also have the opportunity to use
other available software and CAD tools and learn features of
familiar tools which make their use more effective. In the
past, some students have taken the time to share the skills
they've picked up. While extensive documentation is supplied
with tools, tutorials and step-by-step procedures can help others
and save them time. This sharing will now be recognized as part of
the course.
You can also contribute design components which are likely to be
reused. Consider submitting:
Please file each application note in its own subdirectory.
To submit on the web, create a directory with a descriptive name
under an appropriate subdirectory on the department machine login.ece.ualberta.ca
(access with ssh).
Next, announce the existence of your application notes to your class (and your professor) by posting an article to the course group.
You can update your application notes as often as you like, up to the end of classes. Be sure the author's or authors' name(s) are clearly identified near the top of the main document for marking. Since this application notes will be published on the Web, HTML, ASCII text and PDF are all acceptable formats (the content counts, don't get too fancy with the formatting).You are expected to attend all presentations unless you've made other arrangements.
Arrive by 8AM and set up and test your project. The e3-011
lab is our staging area. There should be 4 carts, one per
group per shift. One of the 2 elevators beside e3-011 has a
"G" button and the rear door exits at the loading dock near the
1st floor classrooms - through the door on your left. I
would appreciate the help of those presenting after the break (2nd
shift) with pinning posters to the bulletin boards in the
morning.
First-shift presenters will be demonstrating their projects in
the hall outside of e1-013 by 8:30AM. At the 10:20 break,
first-shift presenters will stow their projects and the
second-shift presenters will demonstrate their projects in the
hall. If you're not giving demos, please be near your poster
to take questions.
Four minutes before the sessions start, the session's 4 projects
will be carted into the e1-013 classroom. You will have 15
minutes for your presentation and demo. During your question
period, the next group will quietly be bringing over their cart
and starting up their project for fast seamless transitions.