ECE511 Digital ASIC Design

ECE511 Digital ASIC Design, Fall 2011

Instructor

Dr. Jie Han, office: W2-079, ECERF, phone: 492-1361

Email: jhan8 (and you should know what follows), homepage

Office Hours: Friday, 3:00 - 4:00pm, or by appointments.

Teaching Assistant

Jinghang Liang, Email: jinghang

Course Information

Lectures: Monday, Wednesday and Friday, 1:00 - 1:50pm

Room: ECERF W6-087

Website: eClass @ the University (Enrolled students will be able to access it by logging into the eClass@UofA.)

Lab information is available in eClass.

Prerequisite

Restricted to graduate students, or consent of the Department.

Course Description

ECE 511 discusses advanced integrated circuit design using the hardware description language VHDL, with a focus on larger scale digital systems. Students will design and implement a digital system using field-programmable gate arrays (FPGAs) as a course project.

Course Objectives

At the end of the course, the student will be able to design digital systems including arithmetic circuits using VHDL and FPGAs, and understand the fundamentals of testing and fault-tolerance issues in nanometric digital systems.

Course Outline:

1. Review of integrated circuit technology and evolution of FPGA technology. (1 week approx.)

2. VHDL hardware description language and design description at the gate and register transfer level. (3 weeks approx.)

3. Sequential circuit and finite state machine (FSM) design. (2 weeks approx.)

4. Design of arithmetic circuits: adders, multipliers, dividers, digital filters, etc. (2 weeks approx.)

5. Design for testability and Basic fault tolerance strategies. (2 weeks approx.)

Advanced topics covered by student presentations. (2 weeks approx.)

Textbooks

Pong Chu, RTL Hardware Design Using VHDL, John Wiley & Sons, 2006, ISBN 0-471-72092-5.

Pong Chu, FPGA Prototyping by VHDL Examples, John Wiley & Sons, 2008, ISBN 978-0-470-18531-5.

And complementary lecture notes/slides.

Marking scheme:

Assignments: 5%

Laboratory: 15% (See eClass for detail)

Midterm Exam: 15% (Tentatively scheduled in the last week of October)

Presentation: 10% (A 20-25 min project presentation in the last two weeks of the class)

Project Report: 25% (A formal report for the project, due in the end of the term)

Final Exam: 30% (Tentatively scheduled in the end of the term)

Academic integrity

The University of Alberta is committed to the highest standards of academic integrity and honesty. Students are expected to be familiar with these standards regarding academic honesty and to uphold the policies of the University in this respect. Students are particularly urged to familiarize themselves with the provisions of the Code of Student Behavior (online at www.governance.ualberta.ca ) and avoid any behavior which could potentially result in suspicions of cheating, plagiarism, misrepresentation of facts and/or participation in an offense. Academic dishonesty is a serious offense and can result in suspension or expulsion from the University.

“Recording is permitted only with the prior written consent of the professor or if recording is part of an approved accommodation plan.”

Policy about course outlines can be found in §23.4(2) of the University Calendar.