Configuring the Stereo Loopback on the X-Stend V1.3 board
The following application note details everything you have to do to get the Stereo Codec driver to work on the X-Stend V1.3 board with the XSA-100 board attached. The code to do this is taken from the XST-Board V1.3 Manual but must be modified to make work. The loopback code causes the output of the codec to loop back to the input. This document includes instructions on:
Changes to the Code found in the XST-Board
V1.3 Manual you must make
Modifying the Clock Frequency
The Pin Summary
In addition to the X-Stend and XSA boards, you will need cd-player or
amplified microphone, and amplified speakers.
Code for the driver and the loopback routine can be found in the " XST-Board V1.3 Manual ", under "Inputting and Outputting Stereo Signals Through the Codec". The code can be used with the following changes:
1) Line 4 in all the modules except the codec package should be
changed to
4- USE work.codec.ALL
instead of
4- USE codec.codec.ALL
2) In the module "loopback" the label "loop" on line -055 is a reserved word. Change this to label to "loops".
3) In the module "loopback" , line 21 reads
021- SIGNAL left_channel, right_channel: (STD_LOGIC_VECTOR 7
DOWNTO 0);
which is not the right size for the channels that are 20 bits wide.
Change this to
021- SIGNAL left_channel, right_channel: (STD_LOGIC_VECTOR 19
DOWNTO 0);
4) If you use a pushbutton for your reset, keep in mind that they
are active low on the boards, but the code is written for active high reset.
In the module "loopback", insert the code architecture
rst<= not notrst;
between lines -074 and -075, and then change the signal "rst" in the
port declaration on line -009 to "notrst" to invert the reset throughout
the code.
5) Delete all the numbers numbering lines of code.
The code is written for a clock frequency of 12 MHZ. The default oscillator frequency on the XSA-100 board is 100 MHZ. To implement the code, you can reprogram the XSA-100 oscillator frequency as described in the " XSA-100 Board V1.2 Manual " , under "Setting the XSA Board Clock Oscillator Frequency", or by implementing an 8X clock divider in code. If you choose to change the board frequency, divide the default frequency by 8. Note that you move the shunt only to set the oscillator frequency, and must also follow the second step, setting the shunt back to "osc" to have the oscillator oscillate at the reprogrammed frequency.
To add a clock divider, create a new module, insert it into the codec package, and create a component in loopback. The following modified modules contain the code ready to be implemented on the XSA-100 board, with the above modifications made, and a clock divider added.
codec.vhd
loopback.vhd
codec_intfc.vhd
channel.vhd
clkgen.vhd
clock_gen.vhd
- A clock divider added to divide the 100 MHz clock down to 12.5 MHz.
As a final step before programming the FPGA, you must assign pins to the output and input signals. The following pin summary can be used for configuring the stereo codec on the XStend V1.3 board combined with the XSA-100 board.
clk -- p88
notrst -- p93
--sets the reset to the reset button found on the XSA-100 board
sdout -- p76
mclk -- p77
lrck -- p59
sdin -- p74
sclk -- p75
s<0> -- p64
--this pin doesn't have to be assigned
s<1> -- p65
--this pin doesn't have to be assigned