RS232
Protocol


INTRODUCTION
This page has been written to clarify the serial protocol used in RS232. Using this, one should be able to develop a RS232 serial port in VHDL. Source code is for a predeveloped RS232 serial port is included in this document.

BACKGROUND

RS232 is a basic serial protocol avalible to most hardware devices. In the most basic case, the RS232 serial protocol consists of two lines: data rx line and data tx line. What this implies is that both ends of the RS232 line must be in sync since to external clock is syncronizing the tranmission of data. Othere signals can be added also for flow control such as the Clear To Send signal and Clear To Recieve signals. Both are Active low.


Serial Protocol
The Serial Line remains high until a data is being sent. The number of data bits can vary from 5 to 8 data bits; however, 8 bits is the general standard. The data bits can include a parity bit for error control. Parity will not be disscussed in detail here, please look under references for more information on error control. Data transmission begins with a start bit, the data payload, followed by a stop bit. The stop bit can vary also, from 1, 1.5, to 2 bits long. NOTE: the code provided with this app note needs a 2 bit long stop bit. The start bit must be the opposite level of the default level to indicate that data is being sent, thus start bits are low. Stop bits are high, and the bits in between varies with the data being sent. The least significant bit is sent first followed by the most signicant bit. Figure 1 illustrates a typical data load.

Figure 1: Serial Transmission Line with Data Payload 01011001


Code
Note that the following code has been taken from the previous App Note RS232 Serial Port. However, there were unexpected bugs in the code, thus it had to be modified by Ben Talbot, Timmy Li, and Andrew Ling.

 

The file serialPort.vhd uses five files that will need to be in your working directory. The files myShiftOut.vhd and myShiftRight.vhd were created automatically by the wizard in MaxPlus2 to optimize the lpm_shiftreg, and are used by RS_232_Out and RS_232_In respectively.

RS_232_Out.vhd

RS_232_In.vhd

myShiftRight.vhd

myShiftOut.vhd

clkdiv.vhd

 



For more information please contact Andrew Ling.



Group Members:
Darren Gonek
Guillermo Barreiro
Andrew Ling
Shyam Chadha
Timmy Li
Reid Orsten


Group AppNotes
TTL to Serial
DC Motor Control
CodeWarrior Tutorial
Surviving VI
RS232 Protocol
RS232 Software Support

References:
Maxim Semiconductor (Free samples of MAX232A IC)
RS232 Serial Port

http://www.oreilly.com/reference/dictionary/terms/P/Parity.htm

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