CRT Synchronization

and Sample VHDL Implementation

Brought to you by the creators of the DPF

Timing and Synchronization

All CRT monitors whether VGA, SVGA, or any other standard require the proper synchronization signals at regular intervals. A monitor displays an image by firing electrons at the phosphorous coating on the inside surface of the screen, which excites the coating to display different colors. This electron beam repeatedly scans from left to right, and from top to bottom to maintain the image on the screen. At the end of each horizontal line, there is a blanking time during which the electron beam is turned off while it scrolls back to the left. During this time, a horizontal sync pulse must be asserted to instruct the beam to perform this retrace. Likewise, there is also a blanking interval and vertical sync pulse for the vertical retrace where the beam scrolls from the bottom to the top of the screen. The following diagram shows the pattern the electron beam follows during a single pass of the screen:


blue = horizontal trace of 1 row
red = horizontal retrace
green = vertical retrace


The time between the end of the pixel data for a line and the beginning of a horizontal sync pulse is called the front porch, and the time between the end of the sync pulse and the beginning of the new line data is called the back porch.

The vertical sync pulse, also has a front and back porch, but it is generally measured in terms of a number of rows (horizontal sync pulses).
 
 





The clock rate and the timing of pixel information, blanking times, and sync pulses determine the resolution of the screen. For example, for a marginless resolution of 640x480 with a 33-MHz pixel clock, a single row actually lasts for 832 clock pulses: 640 for the pixel data, 32 for the front porch, 64 for the horizontal sync time, and 96 for the back porch. Similarly, a pass of the entire screen has 503 horizontal sync pulses: 480 for the screen data (1 for each row), 1 for the front porch, 3 for the vertical sync, and 19 for the back porch.

Although these values of sync and porch times can vary and sometimes depend on the model of the monitor being used, too much deviation from the standards can result in flickering screens, or failure to synchronize with the monitor. Unsynchronized monitors display a blank screen. Also some newer models' power indicators may turn yellow or flash, or their screens may display an error message when they fail to synchronize.

The following table shows the timing values of some typical resolutions. The horizontal values are counted in clock pulses, and the vertical values are counted in rows.
 

Resolution
Pixel Clock
H. Front Porch
H. Sync
H. Back Porch
V. Front Porch
V. Sync
V. Back Porch
640x480
33 MHz
32
64
96
1
3
19
800x600
50 MHz
40
88
128
1
3
23
1024x768
66 MHz
56
104
160
1
3
24

To easily determine timing values for essentially any resolution and clock frequency, there is a standard VESA generalized timing formula which all monitors must support. This Excel Spreadsheet taken from www.vesa.org will calculate the timing values using this formula for any resolution, at any clock, vertical or horizontal frequency.
 

Colors

A resolution of 800x600 means there is a grid of 800 pixels across and 600 pixels down. Each pixel color is set on each clock pulse, and is determined by the voltage levels on the red, green, and blue signal lines connected to the monitor. These voltage levels affect the intensity of each color, and generally range from 0 V to a maximum of 0.7 V. For a pure white pixel, all three color lines will be set to 0.7 V, and for black they will all be 0 V. Likewise, a purely red pixel will have the red line set to 0.7 V and the blue and green lines set to 0 V.

The number of colors available depend on the digital precision of the system. VGA is 8-bit color: 3 bits for red, 3 for blue, and 2 for green. These bits correspond to different intensity levels, so red and blue will have 3^2 or 8 levels each, and green will have 2^2 or 4 levels. Each digital color is sent through a digital-to-analog convertor to set the appropriate voltage level to the monitor. The 3 primary colors are combined with their different intensities to create the color seen on the screen, so the total number of colors available in VGA is 2^8 or 256 colors. Most monitors today use 24-bit SVGA, which corresponds to 16.8 million colors.
 

Sample Code

The DPF project was to design a hardware implementation of a digital picture frame which displayed and scrolled through a number of high resolution, 24-bit color images. To support 24-bit color, the group interfaced an Altera Apex 20KE200 board with an Analog Devices ADV7120 video DAC. The following code is a VHDL test which generates the proper horizontal and vertical sync pulses for 1024x768 resolution with a 66 MHz pixel clock, but it can be easily modified by changing a few constants at the beginning to match any resolution. The .csf file includes the pinouts used on the Apex board to interact with the adv7120 video DAC.

CRT SAMPLE CODE
 
 

If you have any questions/comments, send an e-mail to dng@ualberta.ca
Written by Dave Ng, Mel Lumague, Ben Talbot, Nitin Parimi, Emy Egbogah

Last Modified 4/11/2002