EE 552

Text Messaging Centre

Alan Mak, Ben Lee, Wing Yee Chan, Christina Kwok

Seiko L167200J000 LCD Drivers

  Introduction   Operation   Design
      VHDL Source Code  

 
Introduction

The Seiko L1672 LCD is: 2 lines by 16 characters, 5 X 7 dot matrix.

It is able to display alpha numeric, Japanese KATA KANA characters and a wide variety of other symbols.

The internal operation is determined by the input signals. These signals are:

RS - Register select input consisting instruction register (IR) when RS = 0 and data register (DR) when RS = 1.

R/W - Read/write. Write when R/W = 0 and read when R/W =1.

Data bus.

E - Enable.

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Operation
This LCD runs at 270kHz. Thus a clock divider is needed to change the global clock frequency from 25.175MHz to 270KHz.

Each time the LCD turned on or reset, an initialization procedure must be executed. The initialization sequence consists of turning on the cursor, clear the display, and set it to an auto-increment mode.

When the LCD is performing an internal instruction, set the RS signal to 0 for IR selection.

The instruction code is explained in the following chart:

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Operation

Operation

Operation

VHDL Source Code
Counter_lcd – A simple clock divider, changes the clock frequency from 25.175 MHz270kHz.

LCDdriver.vhd –It follows all the specification as describe above. It is able to drive a 2 lines, 8 bits data transfer LCD.

LCD.vhd - The main LCD module. It uses the global clock which runs at 25.175MHz.

LCD_pack.vhd – The components used for the LCD driver.

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lcd_pkg.vhd

lcd.vhd

lcddriver.vhd

counter_lcd.vhd

This page is maintained by Chris