This application note describes a way to implement a simple fuzzy logic controller in VHDL. Some knowledge of fuzzy logic is beneficial, however there should be sufficient detail in this note that it is not required. There are 3 parts to a fuzzy controller, the fuzzification of the inputs, the defuzzification of the outputs, and the rule-base. The controller that is implemented here demonstrates a 2 input, 2 output fuzzy controller with 7 membership functions for the inputs, and 7 for the outputs.

The fuzzy controller takes input values from the real world. These values are referred to as "crisp" values since they are represented as a single number, not a fuzzy one. In order for the fuzzy controller to understand the inputs, the crisp input has to be converted to a fuzzy number. This process is called fuzzification.

The next step in the fuzzy control process is the implementation of the rule base. This is where the fuzzy inputs are compared and based on the membership of each, the fuzzy output is chosen. For a 2 input system with 7 membership functions for each input, there would be 49 fuzzy rules to compute since they are anded together.

The final step is to convert the fuzzy outputs of the rule-base to crisp ones. This process is known as defuzzification. This process will take a fuzzy number and apply it to a membership function to achieve the crisp number that will be sent to the real world.

To compile any of this code, you must first download and compile this config library, and the synchronizer module

Configuration File

Synchronizer

For this example, non-overlapping rectangular membership functions were chosen for the inputs. The 7 membership functions were assigned the linguistic labels of Positive Large, Positive Medium, Positive Small, Zero, Negative Small, Negative Medium, and Negative Large. Figure 1 shows the graphical representation of the input functions.

Figure 1: Membership Functions

The fuzzification process is synchronous and takes 3 clock cycles to complete. These are pipelined into a compare stage, a decode stage and a synchronize stage to provide optimal throughput. The compare stage can be adjusted by changing the lpm_pipeline parameter in each of the comparators. If this is done, than the number of levels on the synchronizer must be adjusted so the valid signal follows the output.

The entity allows the user to specify the membership functions, however, the linguistics and number of membership functions is currently fixed. These can be modified in this module if different types of functions are desired. For this example, the membership functions are used to assign limits to each of the linguistic modifiers. For example passing in an array of 8, 4, 1, 0, -1, -4, -8 corresponds to the data shown in Table 1.

So while the linguistics and the membership geometry cannot be changed, the membership limits can be.

If different membership function geometries were desired, the fuzzification module would have to be modified to support this.

Fuzzification code

Fuzzification test bench

The rule-base was implemented with a two input, two output system. All the inputs use the same linguistic modifier’s of positive large (pl), positive medium (pm), positive small (ps), zero (z), negative small (ns), negative medium (nm), and negative large (nl). Based on the linguistics, 49 rules were established and outputs were chosen based on the desired output for the system.

For this rule-base, the inputs difference and delta_diff were labeled to verbally show what the signals represent. As well, the outputs left_motor and right_motor are labeled. This rule-base is pipelined and takes 2 clock cycles to complete. This is also the bottle-neck for the system, since the combinational logic to compute the 49 rules is quite large, and quite slow. This module would have to be further pipelined in order to move it onto a faster clock.

If there was no need to modify the linguistic modifier’s then the rule-base could be used as is by modifying the outputs for each case.

Fuzzy rule-base code

Fuzzy rule-base test bench

The process of defuzzification was to take a fuzzy number and convert it to a crisp one. To do this, the limit of the membership function for the output was assigned to the crisp output. This was a very simple method since the membership functions were rectangular and did not overlap. If the output membership functions are required to overlap or not be rectangular, the defuzzification module will have to be modified.

This module is also pipelined so that the output should only be used when the valid_out signal is high.

Defuzzification code

Defuzzification test bench

The rule-base was designed to control the input difference to be 0 so that both motors are travelling at the same velocity, but it didn’t matter what the velocity was. This rule-base, fuzzification, and defuzzification module were simulated in matlab to show the convergence of the system. These results are shown in Figure 2.

Figure 2: Fuzzy Controller Response

Fuzzification Matlab Code

Fuzzy Rule-base Matlab Code

Defuzzification Matlab Code

Combining the 3 modules together is quite easy and is illustrated in the controller code. This code also does some other things to get the crisp data, and to do something with the output data as well which can be ignored.

Controller code

The fuzzy controller is a large, slow design, but is quite useful. Here are some performance measurements on it:

% Logic Cells used : 31%

Maximum Frequency : 25.7 MHz

Again, with a pipelined rule-base the frequency could be increased. As well, limiting the rules, the outputs, and the number of linguistics could provide the performance desired with much less logic cells.

EE564 Course Notes: Fuzzy Controller Design algorithm

Terry Chepyha: Senior Hardware Engineer - WaveRider for the excellent hardware advice

Steve Dillen

Farrah Rashid

The Mazebot Team