-- ADC_pkg.vhd
----------------------
-- ADC package
----------------------
-- this is the package of the ADC7823
----------------------

library ieee;
use ieee.std_logic_1164.all;

package ADC_pkg is

constant clk6400ns : positive := 79;
constant numOfBits: positive := 8;
constant num: positive := 3072;
component ADC
	generic(datawidth: positive);
	port(
		clk: in std_logic;				
		Din: in std_logic;				
		rst: in std_logic;				
		ack: in std_logic;				
		DataRdy: out std_logic;			
		convst: out std_logic;			
		sclk: buffer std_logic;			
		Dout: out std_logic_vector(datawidth-1 downto 0)	
		);
end component ADC;

component clk_divider
	port ( clkin: in std_logic;
		   clkout: out std_logic
		 );
end component clk_divider;

component shReg
	generic (reg_width: positive);
	port (	input:	in std_logic;
		load:	in std_logic;
		clk:	in std_logic;
		rst:	in std_logic;
		output:	out std_logic_vector(reg_width-1 downto 0));
end component shReg;

component DFlip
	port ( Qin, clk, rst, load: in std_logic;
	       Qout: out std_logic);
end component DFlip;

end ADC_pkg;