---------------------------------------------
--Project Gump
--Marc Binette
--Ralph Nevins
--Lambert Lo
----------------------------------------------
--servo_controller_register8bit.vhd
--This is an eight bit register. It has an
--asynchronous reset.
--input=> load(1bit), data_in(8bits), reset(1bit)
--output=> register_out(8bits)

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

--entity declaration of a generic register
--default is 8 bits.
ENTITY servo_controller_register8bit IS
	GENERIC( reg_width : positive := 8);
	PORT(load, reset : IN std_logic;
		data_in : IN std_logic_vector(reg_width-1 DOWNTO 0);
		register_out : BUFFER std_logic_vector(reg_width-1 DOWNTO 0));
END servo_controller_register8bit;

--behavioural discriptio of the register
ARCHITECTURE behavioural OF servo_controller_register8bit IS
BEGIN

--process waits for load or reset
reg : PROCESS(load, reset) IS
BEGIN
	--if reset is high then register_out is set to zero
	IF reset = '1' THEN
		register_out <= (OTHERS => '0');
	--if no reset but there is a rising edge of load then register_out
	--is set equal to data_in
	ELSIF load = '1' THEN
		register_out <= data_in;
	END IF;
END PROCESS reg;

END behavioural;