---------------------------------------------
--Project Gump
--Marc Binette
--Ralph Nevins
--Lambert Lo
----------------------------------------------
--servo_controller_dflip.vhd
--This is a d flipflop
--input=>load(1bit), datain(1bit)
--output=>dataout(1bit)


LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

--entity declaration for the dflipflop
ENTITY servo_controller_dflip IS
	PORT(load, datain : IN std_logic;
		dataout : OUT std_logic);
END servo_controller_dflip;

--behavioural discription of d flipflop
ARCHITECTURE behavioural OF servo_controller_dflip IS
BEGIN

flipflop : PROCESS(load) IS
BEGIN
IF rising_edge(load) THEN
	dataout <= datain;
END IF;
END PROCESS flipflop;

END behavioural;