EPP Handshaking
The most common use of the parallel port is to write data from a PC to a device. The EPP mode can provide support for reverse transfers of data or forward and reverse transfers of addresses. The handshaking for each of these varies only slightly so the focus in this section will be on a forward data write cycle.
For a PC to use EPP under Windows, a mode negotiation phase is necessary. This consisted of a series of handshaking signals where the PC and peripheral determine the mode that they will communicate. This was implemented in one version of the PPI module. Attempts to download under Windows using the default printer driver were not successful. This was the case even with mode negotiation implemented according to available references. After some investigation, the only document known to provide this information was the standard titled "1284-1994 IEEE Standard Signaling Method for a Bi-directional Parallel Peripheral Interface for Personal Computers." This document could only be purchased from the IEEE at a cost too high for the budget of this project.
Therefore, a device driver was written in C with the help of Dan Leder to download data to the PC. Since a PC running DOS could be set to run in EPP mode by the device driver, mode negotiation became unnecessary. Simply writing each byte of a file to the EPP data register would cause the appropriate handshaking signals to be generated by the parallel port controller.
Another problem encountered when attempting EPP transimissions was that excessive ringing was observed on the handshaking and data signals originating from the PC. This resulted in data transmissions that would not complete reliably. This problem was avoided at first by using counters to introduce delays to avoid the ringing. As well, all handshaking input signals were synchronized to the global clock in registers to reduce the chance of signal transitions violating setup and hold times.
The ultimate solution was to implement sampling at the clock frequency of control lines. Due to the fact that the clock had a period of ~40ns, and the parallel port interface operates at least an order of magnitude slower, the control lines were sampled and then once a transition detected, a delay was used to allow the ringing to subside.