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| Chicken Soup for the ASIC Soul: Student Application Notes is a set of answers to frequently asked questions, and they are provided to help you in your quest to finish Electrical Engineering 552 successfully with as few frustrations as possible. |
Use case statement instead of if statement-when using multiple
statements to describe the operation of a system, "if"
statement should be avoided. Instead, use "case"
statemens to perform the operation since case statement uses less
logic cells(modules) and decrease propagation delay.
How to show state names on your simulation waveform: When
using state machines in your program, use the template provided
in MaxPlusII. This will enable your state names to show on your
simulation waveforms. When not using template, sometimes the
names you assign to the states may not appear on the waveform.
Method to access template in MaxPlusII:
| Step 1: | Click on 'File' icon and select 'New' and then
click on Text Editor. |
| Step 2: | Click on 'Template' icon on top of screen and select'
VHDL Template' |
| Step 3: | A table shows various types of templates avaible will
appear on screen. Eg. for a finite state machine program, with an asynchronous reset, select template "state Machine with Asynch. Reset" |
| Step4: | Finally, fill in the blanks on the template |
Saving Multiple SCFs (Waveform files)
You can save more than one .scf file (i.e. waveform file) for
a particular project. For each waveform you make for a
project (using the waveform editor) save it under a different
file name. For example, cipher_0.scf, cipher_1.scf,
etc. To simluate each one, open the simulator and double
click on the file name beside the label "Simulation
Input". A pop-up menu appears where you can choose
which ever .scf file you want to simulate with that project.
In the waveform editor, you can rearrange the signals.
For example, you may want to have reset at the top of the signal
list and then clock. This is also good for sorting out your
inputs and outputs, or pairing up valid_in signals with their
corresponding input (or valid_out signals with their
corresponding output). To do this, click and hold on the
signal's handle (i.e. grey pointer with I or O or B written on
it) and move the signal to the desired location.
Recompile Sometimes Necessary if Pin Change
When downloading a .sof file to the FPGA you may have to
recompile after you make changes to the pin assignments.
Sometimes the new pin assignments do not take effect until the
program has been recompiled.
If you have packages within a higher level entity, you only have to compile the packages -- not each component VHDL file. The only VHDL entity file that you must compile is the top level entity.
For example,
| Assume your top level entity is called top_level.vhd and it contains components from components1_pkg.vhd and components2_pkg.vhd. The components in components1_pkg.vhd are converter.vhd and slow_clock.vhd while the components in components2_pkg.vhd are shifter.vhd fifo.vhd. In this case, you only have to compile components1_pkg.vhd, components2_pkg.vhd, and top_level.vhd -- compiling the packages first, then the top level entity. |
More Numerical Representation in Waveform
While working with the Simulator in MAX+Plus II, a grouped node may be defaulted to a non-desired radix. For example, an 8-bit datain node may be shown in HEX as FF, while the desired radix may be in others like BIN (binary), DEC (decimal), or OCT (octal). This can be changed very easily by following the steps below.
a. select the desired node b. click on the "Node" menu of MAX+Plus II c. click on "Enter Group" d. change to the desired radix. e. click "OK"
OR
a. right click on the desired node on the waveform (.scf) file. b. click on "Enter Group" c. change to the desired radix d. click "OK"
If you have a PC at home and want to be able to work from there, then you can get the CD from the reserve from Cameron Library or download the latest version from Altera. Here's what you have to do:
To get the CD from Cameron Library:
1. Call #: CD1 2. Title: Altera MAX+PLUS II software 24 hour loan of CD.
To download from Altera (Note: the file is greater than 20 MB):
| a. | Goto Altera's web site |
| b. | Click on the University Program link. |
| c. | Click on the Download MAX+PLUS II Ver. X.XX Student Edition link |
| d. | Ensure your computer meets the minimum requirements. |
| e. | Click on the Download MAX+PLUS II Student Edition version X.XX link |
| f. | Follow the instructions on this page. |
There will be times when you need to have the window of view for testing and simulations to be bigger than 100µs. Therefore, you can change the ending time of your waveform range. As well, it is benefitial to be able to change the timing of your clock. The default in Max Plus 2 is the clock can only change according to the grid. To get around this you need to take off the Snap-to-Grid option. See below.
To change the end time do the following:
| a. | Click on File |
| b. | Click on end-time |
| c. | Change appropriately |
To turn off the Snap-to-Grid option:
| a. | Select waveform window with .scf loaded |
| b. | Clock on Options |
| c. | Deselect Snap-to-Grid |
| d. | Now you can customize you clock. |