| 8-Bit Digital-to-Analog Converter |
| Introduction |
This application note provide the design of a 8-bit digital to analog converter by using a DAC chip(DAC0806 or DAC 0808), an operational amplifier (LF 351), a low-pass filter (R-C circuit) and a speaker.The DAC chip can be replaced by the DAC 08C which can provide a bipolar transimission. Two VHDL code are written for the testing of the D/A converter.
| Design |
The first part of the DAC design that we used for our D/A converter was taken from the Typical Application of the DAC0808 8-bit D/A converter .This part of the design included two chips that are DAC0806 and LF351. The DAC 0806 is an 8-bit D/A converter and the LF351 is a JFET input operational amplifier. Both of the DAC0806 and LF351 chips are made by National Semiconductor and work as follows. An 8-bit digital input is loaded onto input lines A1 to A8 of the DAC0806. An 8-bit data word range from 00000000 to 11111111 binary that is 0 to 255 in decimal. The DAC0806 converts this bit data into analog currents Iout. The LF351 then converts these currents into analog voltages. The resulting voltage is equal to Vout. The analog output of the LF 351 is connectied to a low-pass filter and then a speaker.
Equation of Output Voltage after Conversion
Vout = Vref(A1/2 + A2/4+ A3/8+ A4/16 + A5/32 +A6/64 + A7/128 + A8/256) ,where Vref=10V
The following diagram is the schematic wiring diagram of the DAC. Please see the Schmatic Wiring Diagram below:
Figure 1: DAC schematic wiring
| Construction |
DAC0806
Purpose : To convert a digital signal into a analog signal.
The DAC 0806 is a 16-pin DIP chip made by National Semiconductor. The DAC0806 offers fast settling time, high accuracy, high speed multiplying input slew rate and low power consumption. Please refer to the Appendix for a block diagram of the DAC 0806 chip. The schematic diagram of the pin connections of the chip can be found in the specification sheet of DAC0808.
The input lines and their corresponding chip numbers are listed in the table below:
Pin Label for DAC 0806
|
Digital Input line |
pin numbert |
| A1 | 5 |
| A2 | 6 |
| A3 | 7 |
| A4 | 8 |
| A5 | 9 |
| A6 | 10 |
| A7 | 11 |
| A8 | 12 |
| Pin Label | Pin number |
| Vcc(5V) | 13 |
| Vee(-15V) | 3 |
| Vref(+) | 14 |
| Vref(-) | 15 |
| GNC | 2 |
| Iout | 4 |
| NC | 1 |
| Compensation | 16 |
LF351
Purpose: To converts analog currents into analog voltages
The LF351 is a wide bandwidth JFET input operational amplifier made by National Semiconductor. The application of the LF 351 offers us a low cost high speed D/A converter. This device provides wide gain bandwidth, high slew rate and low input bias. The block and connection diagram of the LF351 chip is shown in the specification sheet of the LF351:
| Pin Label | Pin number |
| Input(-) | 2 |
| Input(+) | 3 |
| V- | 4 |
| NC | 8 |
| V+ | 7 |
|
Output (Vout) |
6 |
| Balance | 1, 5 |
For more detail information on the chips , please refer to the Data Sheet
DAC0808 data sheet (same as the DAC0806)
http://www.national.com/pf/DA/DAC0808.html
LF 351 data sheet
http://www.national.com/pf/LF/LF351.html
| Design of the Low-Pass Filter: |
The low-pass filter provides an input signal contains no frequency components above the cutoff frequency of the filter. The cutoff frequency is the maximum frequency passed by the filter. A simple low-pass filter can be implemented by a RC circuit. A RC circuit low-pass filter is shown below in Figure 2.
Figure 2: Simple RC low-pass filter
In telephone communication, the components above 3400Hz are eliminated by a low-pass filter . Therefore, if the bandwidth of the low-pass filter is equal to B , B= 3400Hz.
For the RC circuit:
CR =1/ wo , dc gain=1
CR=1/(2*pi*B)
CR=4.6810e-05 for the cutoff frequency equal to 3400Hz
For C=0.1uf , R= 468 ohms
The values of the resistor R and capacitor C are depend on the cutoff frequency you want for the design. Therefore, the values of the R and C can be varied in order to meet the specifications of the design.
Figure 3: Completed Design of DAC
| DAC design #2 |
- replace the DAC 0806 by DAC08C to get a bipolar output voltage
Another option for the DAC design is shown below.
The second design of the DAC is very similar to the first design except the DAC chip is changed to DAC 08C . DAC 08C is also a 8 bit monolithic D/A converters. The major difference between the chip DAC 0806 and DAC08C is the DAC 08C provides a bipolar transmission and the DAC 0806 provides an unipolar transmission.
Unipolar transmission:
This is the simplest ways fo transmitting a sequence of 1's and 0's is to transmit a +V-volt signal for a digital 1 and a 0-volt singal for a digital 0.
Bipolar transmission:
Similar to unipolar tranmission but it transimit a +V-volt signal to a ditial 1 and a-V-volt signal for a digital 0.
For the pin connections and more information of the DAC08C, please refer to the data sheet.
http://products.analog.com/products/info.asp?product=DAC08
VHDL Code for testing the DAC:
To test the DAC components, a VHDL code called dac.vhd and dsctest.vhd were used.
The code of dac.vhd is used to input the digital inputs by the switches on the UP1 Education Board.The output of the program is need to be assigned to the pin number of the board and then connect the wire to the hole of the board with the input pin of the DAC. All the 8 bits digital input is connected with the 8 switches. Therefore, if the switches are changing, the voltage output(Vout) from the DAC will change. For example, if all the switches are opened, the output voltage will equal to 10V according to equation(1) since the digital equal to 11111111.
port( switches : in std_logic_vector(7 downto 0);
output : out std_logic_vector(7 downto 0);
end dac;
architecture behaviour of dac is
begin
output <= switches; --assign all the switch inputs to the outputs
end behaviour; --end of the program
The second program that is used to test the DAC is called dsctest.vhd. dsctest.vhd is a 8bits counter that count from 00000000 to 11111111. Therefore, the analog output from the DAC should be ramp function which look like a right triangle waveform. In the program, a slow clock is used to slow down the clock from the UP1 Education Board(25.175MHz).
Please refer to http://www.ee.ualberta.ca/~elliott/ee552/studentAppNotes/98f/clk_div / for the clock divider.
entity dsctest is generic(counterwidth:positive:=8);
port(aclr, clock,enable : in std_logic; ccheck:out std_logic;
a:out std_logic_vector(counterwidth-1 downto 0);
q :buffer std_logic_vector(counterwidth-1 downto 0));
end dsctest;
Package dsc_pck is --use package to call the clock divider out
component clk_div generic(N: positive:= 1000000);
port (fast_clk, reset: in std_logic;
slow_clk: buffer std_logic );
end component clk_div;
end dsc_pck;
library work;
use work.dsc_pck.all;
architecture mixed of dsctest is
signal slow_clk: std_logic;
begin
slowclk: clk_div port map(fast_clk=>clock, reset=>aclr, slow_clk=>slow_clk);
--use the clk_div.vhd to slow down the clock
counter : process(aclr, slow_clk)
begin
if aclr = '0' then --active low
q <= (others=>'0');
elsif rising_edge(slow_clk) then
if enable = '1' then
q <= q + 1; --The counter count form 0 to 255
end if;
end if;
a<= not q; --the output a is used to show the changing of the counter output on the LEDs
end process counter;
end mixed; --end of the program
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References |
- http://www.national.com/pf/DA/DAC0808.html
- http://products.analog.com/products/info.asp?product=DAC08
- http://www.national.com/pf/LF/LF351.html
- Modern Digital and Analog Communication System by B.P.Lathi
- Microelelctronic Circuit by Sedra/Smith
Last updated: November 9, 1999