-------------------------------------------------------------------------------
-- 2-bit to 1-bit Multiplexer
-- Author       : Tam Paredes
-- File Name    : mux2_1.vhd
-- Architecture : Behavioral
-- Description  : This multiplexer takes in two inputs and uses the third
--				  input to control the output.  If the select line is logic 0,
--				  inputA is selected; if line is logic 1, inputB is selected.
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;

entity mux2_1 is
		port(inputA  : in std_logic;
             inputB  : in std_logic;
             sel     : in std_logic;
             output  : out std_logic
        	);
end mux2_1;

architecture behavioral of mux2_1 is
begin

	process(inputA,inputB,sel)
	begin
		if sel = '0' then
			-- If select line low, transmit inputA
			output <= inputA;
		else
			-- If select line high, transmit inputB
			output <= inputB;
		end if;
	end process;

end behavioral;