LPM_WIDTHP = MAX(LPM_WIDTHA+LPM_WIDTHB, LPM_WIDTHS)
If pipelined, instantiate "clock", otherwise leave for default.
Error is strange when instatiation assignment arrow is backwards (error message will be included later).
| Notes | Width | Pipelines | Optimization | Logic Cells | Speed |
| Constant input, Sum input | 16-bit | 1 | 5 | 75=6% | 69.5ns |
| " | 16-bit | 1 | 6 | 86=7% | 64.8ns |
| " | 16-bit | 1 | 10 | 91=7% | 52.9ns |
| Constant input | 16-bit | 1 | 10 | 30=2% | 29.7ns |
| " | " | 1 | 0 | 24=2% | 27.3ns |
| 16 & 8-bit inputs | 16-bit | 0 | 0 | 345=29% | 92.4ns |
| " | " | 0 | 0, fast | 255 | 42.3ns |
| " | " | 1 | " | 256 | 24.6ns |
| " | " | 3* | " | 260 | 15.8ns |
| 16 & 19-bit inputs | 18-bit output | 0 | 0 | 843 | 124.7ns |
| " | " | 4* | 0 | 860 | 82.2ns |
| " | " | 4* | 0/10,fast | 629 | 19.0ns |
| 18 and 19-bit inputs | 20 bit output | 4 | 0,fast | 743 | 27.2ns |
| 18 and 19-bit inputs | 20 bit output | 5* | 0,fast | 771 | 18.6ns |
Sum input width = Output width
* indicates optimum performance/utilization as given by Altera compiler Info.
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