Combinational Logic vs. ROM

 

 

Objective:

The objective of this application note is to compare the use of a ROM and Combinational Logic to drive a LCD display. Comparisons will be made in the number of logic cells used, minimum clock period, and program and design complexity.

 

Background:

When working on our project, we discovered that our LCD output needed too many logic cells to allow for other significant tasks to be controlled by our FPGA. The manner in which we initially chose to implement the outputs was combinational logic. This proved inefficient because printing two screens required 623 logic cells. Because our project required eight different output screens, this would have been impossible using combinational logic and would have left no logic cells for the remainder of our project.

A solution to this shortage of logic cells was to implement the output using of the ROM. The ROM stores the output data, which we then access when necessary. The data is placed in a file that it is programmed in the embedded array blocks on the FPGA. The LCD screen used is the SHARP LM16255 LCD screen (shown below).

 

 

Comparison:

The use of combinational logic requires that the all output lines be driven when the output flag has been set. This drives the correct values for the desired output. When using the ROM the data is accessed from the memory location at which it is stored. Once the output flag has been set the LPM_ROM module simply accesses the data stored at the specified memory location. The data is written in a memory file and then configured upon compilation.

 

# of EAB's

Combinational Logic --- # of Logic Cells -- 623/1152

--- # of EAB's -- 0/6

ROM --- # of Logic Cells -- 110/1152

--- # of EAB's -- 1/6

 

*all number are based on the both implementing 2 screens and the ROM storing 8 screens

 

Conclusions:

We find the ROM much preferable when dealing with the case of constant output to LCD. The reduction in the number of logic cells used is dramatic and resolves our major concern. The minimum clock periods for both cases are comparable. In regards to the complexity of our design both cases were once again comparable. Alterations to the output of the LCD will be easier to implement in ROM than in combinational logic, as it requires changes to only the data file.

Another alternative may have been to use the RAM available on the Flex10K20 chip with the aid of the LPM_RAM module. The RAM module allows the user to write to memory during operation as opposed to writing only at load up. The ROM module and RAM module are identical, save that the write line on the module is tied to ground for ROM.

 

 

A valuable source of information on ROM implementation and creation of data files can be found at the following websites:

http://www.ee.ualberta.ca/~elliott/ee552/studentAppNotes/98f/Rom_hints,

http://www.altera.com/html/literature/lf10k.html.

 

This Application Note was created by:

Denise Garvey denise@ieee.org

Matthew Remington mjr@ualberta.ca

Rishi Kapoor rkapoor@ualberta.ca

 

For further information please contact one of the proceeding.