APPLICATION NOTES: Provided by: Tyler Brandon, Chris Blasko, Kevin Lister. This file contains a Simplified VGA Monitor Interface. It should be noted that while this code is mostly functioning, all of the bugs have not been worked out. So if you need a template these programs are a good place to start. Also, as the program is developed the newer versions will be posted to the Application notes. |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| -- Monitor.vhd -- -- Displays different colored vertical bars. Each bar is one pixel in with -- and 480 pixles in length. Resolution 640x480 -- -- It is our intent to provide a simple, ready to use, -- module (the code your looking at) to control the monitor. -- The VGA monitor is controled by ONLY TWO outputs: a horizontal sync -- and a vertical sync. Other than those two signals the monitor, does -- everything else on its own. IT IS YOUR DUTY piolet to fire the Red, -- Green and Blue outputs at the apropriate time to create the picture -- on the screen, BY NO MEANS is the monitor going to wait for you. -- -- The vertical sync (active low) will send the electron beam to the top left most -- corner of the screen. The Horizontal sycn (active low) will send the electron -- beam to the next line (or row, for you spredsheet people). Timing -- documentation can be viewed in the, Altera University Program Design Laboratory -- Package (you thing they could have found a longer name?) -- -- Good luck (the way this code is written, your going to need it ;) ) -- Uses Flex 10K20 Device -- -- Oginial code (razzle.vhd) by Jim Hamblen, -- Georgia Tech School of ECE -- -- Modified for use in the Arkanoid project by Tyler Brandon, Chris Blasco -- and Kevin Lister, -- University of Alberta -- library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity monitor is port( signal Clock, reset : in std_logic; signal Red,Green,Blue : out std_logic; signal Horiz_sync,Vert_sync : out std_logic ); end monitor; architecture behavior of monitor is -- Video Display Signals signal H_count,V_count: std_logic_vector(9 Downto 0); signal Red_Data, Green_Data, Blue_Data : std_logic; constant H_max : std_logic_vector(9 Downto 0) := "1100011111";--799 -- 799 is max horiz count constant V_max : std_logic_vector(9 Downto 0) := "1000001100";--524 -- 524 is max vert count signal video_on, video_on_H, video_on_V: std_logic; begin -- Colors for pixel data on video signal (Unrelated to the actual -- generation of output on a VGA monitor.) -- -- *This just determines "what" to display* -- -- (in this case, it displays vertical bars of color) process( Clock ) variable sum : std_logic_vector( 2 downto 0); begin if rising_edge( Clock ) then if reset = '0' then sum := "000"; else sum := sum + '1'; end if; Red_Data <= sum(2); Green_Data <= sum(1); Blue_Data <= sum(0); end if; end process; -- -- -- Makes sure the electron beam in the monitor isn't trying to display -- colors outside of the view area (i.e. on your lab partners forhead). Red <= Red_Data and video_on; Green <= Green_Data and video_on; Blue <= Blue_Data and video_on; -- video_on turns off pixel data when not in the view area video_on <= video_on_H and video_on_V; --Generate Horizontal and Vertical Timing Signals for Video Signal VIDEO_DISPLAY: process begin Wait until(Clock'Event) and (Clock='1'); if reset = '0' Then H_count <= (others => '0'); V_count <= (others => '0'); Video_on_H <= '0'; Video_on_V <= '0'; else -- H_count counts pixels (640 + extra time for sync signals) -- -- <-Clock out RGB Pixel Row Data -> <-H Sync-> -- ------------------------------------__________-------- -- 0 640 659 755 799 -- if (H_count >= H_max) then H_count <= (others => '0'); else H_count <= H_count + '1'; end if; --Generate Horizontal Sync Signal if (H_count <= 755) and (H_count >= 659) Then Horiz_Sync <= '0'; else Horiz_Sync <= '1'; end if; --V_count counts rows of pixels (480 + extra time for sync signals) -- -- <---- 480 Horizontal Syncs (pixel rows) --> ->V Sync<- -- -----------------------------------------------_______--------- -- 0 480 493-494 524 -- if (V_count >= V_max) and (H_count >= 699) then V_count <= (others => '0'); else If (H_count = 699) Then V_count <= V_count + '1'; end if; end if; -- Generate Vertical Sync Signal if (V_count <= 494) and (V_count >= 493) Then Vert_Sync <= '0'; else Vert_Sync <= '1'; end if; -- Generate Video on Screen Signals for Pixel Data if (H_count <= 639) Then video_on_H <= '1'; else video_on_H <= '0'; end if; -- Has the beam reached the bottom of the viewing area? if (V_count <= 479) Then video_on_V <= '1'; else video_on_V <= '0'; end if; end if; --End Wait until clock end process VIDEO_DISPLAY; end behavior;