-- VGA.vhd (part of VGA_buf.vhd)
-- 320x240 resolution
-- 
-- Uses Flex 10K20 Device
--
-- Modified from Monitor.vhd (Arkanoid project) which was in turn modified 
-- from the oginial code razzle.vhd by Jim Hamblen, Georgia Tech School of 
-- ECE
--
-- Modified for use in VGA_buf.vhd by Tyler Brandon, Chris Blasko
-- and Kevin Lister, 
-- University of Alberta
--
library ieee;
use  ieee.std_logic_1164.all;
use  ieee.std_logic_arith.all;
use  ieee.std_logic_unsigned.all;

entity vga is

	generic(	ADDRESS_WIDTH 	: positive := 17;
				DATA_WIDTH		: positive := 8 );

   port(	signal clock, reset : in std_logic;
			signal v_sync		: out std_logic;
			signal Red,Green,Blue : out std_logic;
	        signal Horiz_sync,Vert_sync : buffer std_logic;
			Address		:out std_logic_vector(ADDRESS_WIDTH-1 downto 0);
			data		:in std_logic_vector(DATA_WIDTH-1 downto 0) );

end vga;

architecture behavior of vga is

-- Video Display Signals   
signal H_count,V_count: std_logic_vector(9 Downto 0);
signal Red_Data, Green_Data, Blue_Data : std_logic;

constant H_max : std_logic_vector(9 Downto 0) := "1100011111"; 
-- 799 is max horiz count
constant V_max : std_logic_vector(9 Downto 0) := "1000001100"; 
-- 524 is max vert count
signal video_on, video_on_H, video_on_V: std_logic;

signal toggle : std_logic;

begin           

-- Colors for pixel data on video signal (Unrelated to the actual
-- generation of output on a VGA monitor.)
--  
-- *This just determines "what" to display*
--
-- Assumpitions: 320x240, 70ns RAM, 40ns Clock
	process( Clock )
	variable sum : std_logic_vector(ADDRESS_WIDTH-1 downto 0);	
	begin
		if rising_edge( Clock ) then
			if reset = '0' then

				sum := (others=>'0');
				toggle <= '0';

			elsif video_on = '1' then
				
				if toggle = '1' then

					sum := sum + '1'; 
					toggle <= '0';
				else
					toggle <= '1';
				end if;
			end if;
			
			if Vert_sync = '0' then
		
				sum := (others => '0');

			end if;

			Address <= sum;
			
			Red_Data <= data(2);
			Green_Data <= data(1);
			Blue_Data <= data(0); 
		end if;
	end process;
--
--

Red <=   Red_Data and video_on;
Green <= Green_Data and video_on;
Blue <=  Blue_Data and video_on;

v_sync <= not video_on_V;--Output the vetical sync signal.
--the v_sync signal represents the starting of the longest
--period of time in which the display is inactive.


-- video_on turns off pixel data when not in the view area
video_on <= video_on_H and video_on_V;

--Generate Horizontal and Vertical Timing Signals for Video Signal
VIDEO_DISPLAY: Process
Begin

	Wait until(Clock'Event) and (Clock='1');
		if reset = '0' Then
			H_count <= (others => '0');
			V_count <= (others => '0');
			Video_on_H <= '0';
			Video_on_V <= '0';
		else
		-- H_count counts pixels (640 + extra time for sync signals)
		--
		--   <-Clock out RGB Pixel Row Data ->   <-H Sync->
		--   ------------------------------------__________--------
		--   0                           640   659       755    799
		--
			If (H_count >= H_max) then
   				H_count <= (others => '0');
			Else
   				H_count <= H_count + '1';
			End if;

			--Generate Horizontal Sync Signal
			If (H_count <= 755) and (H_count >= 659) Then
   				Horiz_Sync <= '0';
			ELSE
   				Horiz_Sync <= '1';
			End if;

			--V_count counts rows of pixels (480 + extra time for sync signals)
			--	
			--  <---- 480 Horizontal Syncs (pixel rows) -->  ->V Sync<-
			--  -----------------------------------------------_______---------
			--  0                                       480    493-494      524
			--
			If (V_count >= V_max) and (H_count >= 699) then
   				V_count <= (others => '0');
			Else If (H_count = 699) Then
   				V_count <= V_count + '1';
			End if;
		End if;

		-- Generate Vertical Sync Signal
		if (V_count <= 494) and (V_count >= 493) Then
   			Vert_Sync <= '0';
		ELSE
   			Vert_Sync <= '1';
		End if;


		-- Generate Video on Screen Signals for Pixel Data
		If (H_count <= 639) Then
			video_on_H <= '1';
		ELSE
   			video_on_H <= '0';
		End if;


		If (V_count <= 479) Then
   			video_on_V <= '1';
		ELSE
   			video_on_V <= '0';
		End if;

	End if;  --End Wait until clock

end process VIDEO_DISPLAY;

end behavior;