Ethernet (IEEE 802.3) Overview |
This document provides an overview of ethernet, a local area network (LAN) technology that provides flexible, low cost, high speed connectivity for a diverse range of computer systems and peripherals. Ethernet ranges in speed from 10 up to 1000 Mbps and can be transmitted across twisted pair, coaxial or fibre optic media depending on the implementation. Specifically, this document will focus on the 10 Mbps twisted pair variant. The physical electronics, signaling and medium access will be explained along with data formats required by the specification.Also included are a number of specific VHDL implementation examples for an ethernet transciever control system and CRC generator.
Ethernet was originally researched by Xerox, and the name "Ethernet" has been trademarked by them. Later, the technology was reworked and standardized by the IEEE. The 802.3 specification defines these standards for the physical network medium and required hardware interfaces.10BaseT ethernet has become the corporate standard for Local Area Network (LAN) communications. It provides 10 million bits of data per second, serially across unshielded copper twisted pair wiring.
Ethernet is a CSMA/CD (Carrier Sense Multiple Access with Collision Detection) protocol."Multiple Access" indicates that numerous stations share a common bus. Ethernet is a broadcast medium, where data sent onto the bus will arrive at all connected stations.
"Carrier Sense" means that stations are able to monitor the current status on the medium to determine if another station is currently transmitting data, or if the bus is idle and available for any station to send data.
"Collision Detection" allows stations to identify when more than one station have attempted to transmit data onto the bus within the same transmission window. Since the bus is shared, and there is no formal arbitration method to determine which station can send data, collisions are a normal occurrence. In the event of a collision, the stations that were attempting to send will abort the current transmission and retry after a random period. This randomness minimized repeated collisions when these stations retry their transmissions.
In order to ensure that collisions can be properly detected by all stations on the bus, a minimum frame size must be set. This is done to allow enough time lapse while a station is sending a frame to acknowledge a collision with the most distant node on the bus.
This worst case analysis allows a maximum round trip time of 50 microseconds. In this time, 500 bits, or slightly less than 64 bytes of data can be inserted onto the medium. As a result, the minimum ethernet frame must be 64 bytes long. If the frame payload is small, it will be padded to attain a full 64 bytes.
Preamble Delimiter Dest Address Source Address Length Data Pad Checksum 7 1 6 6 2 0 to 1500 0 to 46 4 (bytes) Each frame begins with an 7 byte preamble containing 10101010 in each byte. When encoded onto the physical medium, the preamble appears as a square wave at 10MHz for 5.6 micro seconds. This allows the receiver's clock to synchronize with incoming data. The preamble is followed by a start of frame delimiter, 10101011 that will identify the start of the frame.
The source and destination addresses each uniquely identify a single station or interface. As a frame is read from the channel, the destination address will be compared with the station's own address. If these match, the entire frame will be read, and directed to an appropriate software driver for further processing. Generally, all other stations will stop reading the frame when they discover they are not the intended recipient.
The length field specifies how many bytes will be present within the data field. This is required as a means to identify the end of a frame. Additionally, it is needed to recognize and remove any padding that has been added to the frame's payload. Data lengths can vary from 0 to 1500 bytes, however as mentioned above in the Medium Access section, a frame can not be shorter than 64 bytes to ensure the acknowledgement of worst-case collisions. As a result, a short frame will be padded up to 64 bytes, and the length field will later be used to split the actual payload from the padding upon frame reception.
The 32 bit checksum provides a cyclic redundancy check as means of error control. If the frame's CRC does not match the value computed by the recipient, the frame will be thrown out. More details on how this checksum is generated and tested are included below under the heading Error Detection.
Since the ethernet receiver derives it's clock from the incoming data stream, using a direct signal encoding of 0 volts for a logic 0 value and 5 volts for a logic 1 value could lead to timing problems. Specifically, a long string of 1's or 0's could cause the receiver to lose synchronization with the data. Further, the recipient would be unable to determine the different between an idle sender (0 voltage) and a string if 0's (again 0 voltage).The solution for this dilemma is found in ethernet's encoding scheme. Rather than transmitting the logic level directly, Manchester encoding is used. With this technique, one transition is guaranteed for each bit cycle. A binary 1 is encoded as a transition from high to low, and a 0 equates to a transition from low to high. However, the trade-off for this synchronization technique is that twice the signaling bandwidth is required, since there must be two pulse for every bit transmitted. As a result, 10 Mb/s ethernet actually works with a 20MHz serial data signal.
The purpose of error detection is to allow a station to verify the integrity of the data within a frame that has been transmitted through a noisy medium. To accomplish this, the transmitting station uses a standardized function to create a checksum that is added to the end of the frame. The same function cam then be reapplied by the recipient. The two checksums should match, implying that no bit errors were induced into the frame. Otherwise, it can be concluded that errors are present and the frame can be discarded. (The only thing worse than no data, is bad data)In ethernet, the particular checksum used is known as CRC (Cyclic Redundancy Check). The value for an N-bit CRC can be generated by divinding a data stream with N trailing zeroes by an N-bit constant which is common to both the transmitter and recipient. The remainder of this division is our CRC value.
This seems a fairly trivial task, until one considers the potential size of the dividend of the division operation. In an ethernet implementation, this could be as long as 12000 bits (1500 bytes), which easily exceeds the capabilities of standard 32 bit registers, and quite simply could not be contained within any modern FPGA.
However, there is a fairly simply solution. Since we are only interested in the remainder of the division operation and not the quotient, we can go about this a little differently. By working with a register the same size as our target checksum, we are able to shift the serial data through the register, while simply using XORs as linear feedback to the register. Basically, it works like this:
The register now contains the remainder.
Load the register with zero bits.
Augment the message by appending N zero bits to the end of it.
While (more message bits)
Shift the register left by one bit, reading the next bit of the augmented message into register bit position 0.End
If (a 1 bit popped out of the register during step 3)
Then Register = Register XOR Generator Poly.
[Source: A Painless Guide to CRC Error Detection Algorithms]This algorithm has been ported to VHDL, for general purpose use (not specific to ethernet) and can be used to generate and test N bit CRC checksums.
crc_gen.vhd - VHDL Generic CRC Generator Source
A VHDL based system has been designed to control a National Semiconductor DP83910A ethernet transciever. While this system has been designed specifically with the DP83910A in mind, due to the generic nature of the DP83910A and the standard ethernet signalling and frame formats involved this design should be directly applicable to similar applications with different interface chips.Ethernet Control System State Table
ethernet.vhd - VHDL Ethernet Controller Source
- Repeater
- Operates at the physical layer of the OSI model, this "dumb" device simply retransmits incoming data to an outgoing port.
- Hub
- A multi-port repeater, that retransmits incoming data to multiple outgoing ports.
- Switch
- This device operates at the data-link layer of the OSI model. The switch maintains an address table that maps the physical location of a station to a particular port on the switch. When a frame arrives, if the physical location of the destination is known, the frame will be forwarded only on the appropriate outgoing port. If the destination is not know, the frame will be forwarded onto all ports.
- Bridge
- A two port switch.
- Router
- Routes act as a gateway between networks. Functioning at the network layer of the OSI, any packets addressed specifically to the router will be forwarded to an appropriate remote location.
- 10Base-2
- Ethernet media specification for RG58 (50 ohm) "thin" coax running at 10 Mb/s.
- 10Base-5
- Ethernet media specification for ohm coax running at 10 Mb/s.
- 10Base-T
- Ethernet media specification for UTP (Unshielded Twisted Pair) cable with RJ-45 connections running at 10 Mb/s.
- 100Base-T, 100Base-TX, 100Base-T4
- As above, but requires CAT5 UTP and runs at 100 Mb/s.
- 10Base-F
- Ethernet media specification for fibre optic cable running at 10 Mb/s.
- 100Base-FX
- As above, but runs at 100 Mb/s.
G = 1 billion (10^9), not 2^30 M = 1 million (10^6), not 2^20 b = bits B = bytes = 8 bits
- WWW References
- Ethernet WWW Home Page, Chris Spurgeon
Ethernet (10Base-2,5,T,F) Reference Guide, Chris Spurgeon
Ethernet LAN Technology, Thomas Miller
Introduction to Ethernet Technology, H Gilbert
Ethernet FAQThe CRC Pitstop, Ross N. Williams
A Painless Guide to CRC Error Detection Algorithms, Filip Gieszczykiewicz
Cyclic Redundancy Checking for Ethernet
- Text Books
- Bertsekas and Gallager, Data Networks, Second Edition, Prentice Hall, 1992.
A. Tannenbaum, Computer Networks, 3rd Edition, Prentice Hall, 1996.
- Hardware
- If you're looking for ethernet transceivers for your project, you'll probably find what you're looking for on one of these sites. National Semiconductor is recommend, as you can expect a 2 to 5 day turnaround on any parts currently in production.
National Semiconductor - Ethernet Product Catalog
Seeq - Data Communications Product Info
Level One - Networking Product Line
LSI Logic - Networking: LAN and WAN Equiptment
Cirrus Logic (Cyrystal Semiconductor) - Ethernet Products