Using TTL components in Maxplus2

 

If you have to use TTL components this would probably help you

You need to do the following :

Under help menu choose Old Style Macrofunctions.

In the Old Style Macrofunctions window you can choose from the available categories of functions. You can also display the a numerical listing if you click on the hyperlink Old Style Macrofunctions(by number)


Example of using a 8-Bit Bidirectional Shift Register (74198)

The following information will be displayed by Maxplus2

(in the help, as described above) 

Default Signal Levels: GND--SLSI, SRSI, A, B, C, D, E, F, G, H, S0, S1, CLK, VCC--CLRN

Function Prototype: 

FUNCTION 74198 (clrn, s1, s0, clk, slsi, srsi, a, b, c, d, e, f, g, h)

RETURNS (qa, qb, qc, qd, qe, qf, qg, qh);


 

Using the above information you have to write down the following code in VHDL 

LIBRARY altera;

USE altera.maxplus2.ALL;

library ieee;

use ieee.std_logic_1164.all; 

entity ShiftRegister is

Port ( Load_P:in std_logic_vector(7 downto 0);

Out_P: out Std_Logic_vector(7 downto 0);

Shift, Clock:in std_logic

);

End ShiftRegister;

Architecture ttl_comp of ShiftRegister is

Signal H, L: std_logic; 

BEGIN

H <= '1';

L <= '0';

P_Register: A_74198 Port Map (

clrn=>H, s1=>H, s0=>Shift,clk=>Clock,slsi=>L,srsi=>H,a=>Load_P(0),b=>Load_P(1),c=>Load_P(2),d=>Load_P(3),

e=>Load_P(4),f=>Load_P(5),g=>Load_P(6),h=>Load_P(7),qa=>Out_P(0),qb=>Out_P(1),

qc=>Out_P(2),qd=>Out_P(3),qe=>Out_P(4),qf=>Out_P(5),qg=>Out_P(6),qh=>Out_P(7)

);

End ttl_comp;

Authors:

Mandeep Panech

Usama Al-Shiraida

Amit Aggarwal