The keypad discussed here is available from the Electronics Resource Room in CEB 355. Its model number is 83-BB1-002.
The layout of the keyboard is shown below. The y-signals from the keyboard are connected to pull-up resistors so that they are high when no key is pressed. The x-signals are connected to pull-down resistors so that they are low when no key is pressed.
Debouncing immediately after a key is pressed or released
Debouncing occurs right after a key is pressed or released. Each time the X and Y inputs change because of a keypress or keyrelease, we wait 1 ms before sampling the X and Y values. Hopefully, any oscillations would have died out during this time. A counter is used to count from 0 up to 25175 each time the clock signal goes high, since this corresponds to 1 ms when the internal 25.174 kHz is used.
Description of pins
Signal | Description | Input/Output |
Col_input | These are the pins connected between the keyboard and the Altera board. They correspond to X1 to X4 and Y1 to Y4. | Input, 8 bits |
KeyData | Binary representation of which key is pressed (0 to F) | Output, 4 bits |
KeyAvailable | When high, indicates that the value of KeyData is valid | Output, 1 bit |
Here is a hard copy of the VHDL file and the scf file : keydecoder.tar.gz
Last update : October 28, 1998
Send any questions or comments to Su-tarn Lim : sulim@ee.ualberta.ca
Group : Sydney Tang, Su-Tarn Lim, Chen-song Qin
Acknowledgements: Edgar Wong for his debouncing ideas