TIPS FOR DESIGNING USING THE ALTERA UP1 BOARD

1.    Start early.

2.    Pick a reasonably sized project. Although there are 1152 modules on the 10K20 chip, 9 - 11 big entities would probably eat up all that resources.

3.    Sharing disk space with your project members is a good idea. There might not be enough disk space to hold the entire design in one account. The command to do this is :

        fs setacl <directory> <user id> <access type>

            <user id> : id of the user begin granted access
            <directory> : the path being given access
            <access type> : access type, eg. read, write

        fs setacl ~user1/ee552/project/ user2 write
        fs setacl ~user1/ee552/ user2 l
        fs setacl ~user1/ user2 l

* the last two lines permit user2 to get into the project directory
without letting him/her listing its preceding directories.

If you still run out of disk space, try removing the .cnf files.

4. Break you project into smaller stages. Take things one step at a time. If you are writing a interface module with a hardware (i.e. keypad), download it for test after doing simulation. DO NOT assume that it works and only to find out later on when you put your project together that it is that interface module that is giving you the problem. This might be very time consuming, especially if you are on a tight schedule.

5. Get familiarize with the MAX+plusII environment as soon as possible. Do not try to write your VHDL code in Mentor Graphics and then import it into MAX+plusII. A number of the functions are not implemented in MAX+plusII.

6. The MAX+plusII compiler does not allow very big state machines. So, limit the size of your state machine and break it into smaller processes. But keep in mind that no one signal can appear on the sensitivity list of 2 concurrent processes. This is a common error. The compiler only allows the detection of one rising edge in a process.

7. In most of the cases, using an asynchronous reset could reduce the number of logic modules used. Also, remove redundant signal assignments. Those will cost you too !!

8. If external hardware is build, always power it up with an external (+5 V) power source. Avoid using the +Vcc output from the UP1 Board. It might cause the system to be unstable. However, remember to ground the supply to the board ground.

9. Try to use active low logic when interfacing with external hardware. It gives better performance. If your external interface uses switches, make sure that you include pull-up or pull-down resistors as required.

Last Update: April 9, 1998
By Allen Ong, Yat Lai, Ritchie Poon
email: apkong@ee.ualberta.ca