Using Altera LPMs to implement memory


In the MAX+PLUS II documentation (of which this document is a summary), Altera strongly recommends avoiding 2-D bit arrays in favour of their LPMs designed specifiecally to take advantage of the built-in SRAM cells of the FLEX devices. This memory can be used asynchronously or synchronously. However, to avoid trouble, Altera (and the authors of this AppNote) recommend that synchronous mode be used unless you have a compelling reason not to, or you have masochistic tendencies. There are several LPM's to choose from:

lpm_ram_dq
Affectionately known to us as "Dairy Queen" RAM, lpm_ram_dq provides separate input and output data ports. This is sort of like an array of D latches or flip flops, with a "d" input and a "q" output (hence our term Dairy Queen).

lpm_ram_io
We don't have a nickname for this one, since we ended up using DQ ram for our design. This module provides a single I/O port for data.

lpm_rom
Although the FLEX device is volatile, it can be configured to supply "ROM" of sorts. It simple implemets the same SRAM cells, but provides a single, unidirectional output port for data and has no Write Enable input.



Back to "Memory and the Altera FLEX device"
9 April, 1998