Using an LCD in any hardware project allows the builder to increase the appeal with relative ease. The LCD that is discussed below is a 16 by 2 LCD with enough ram to hold 80 characters. The following information should apply to most standard 16 by 2 LCD (I used an Emerging Technologies LCD while refering to Sharp LM16255 spec sheets).
Connecting the LCD to your Project
- Pins 7 through 14: Data lines - Data lines of the LCD can be connected directly to the FPGA pins designated as the LCD data pins.
- Pin 6 : LCD enable line - Again this can be connected directly to the FPGA. However, when programming the FPGA you must allow the data lines to stablize before enabling the LCD.
- Pin 5: Read/Write* line (R/W*) - You find that it is easier to ground this line rather than connect this line to the FPGA. If you are careful when writing to the LCD you will not need to read from it. Reading from the LCD would allow you to determine where your cursor is, and whether the LCD is busy doing an internal instruction. If you want to avoid reading from the LCD you can simply wait 2 ms before writing the next character ( during initialization the delay between instructions is longer). It is also possible to move the cursor to a specified address on the LCD.
- Pin 4: Register Select (RS) - The LCD contains two registers, an instruction register and a data register. The instruction register is used for initialization, cursor position and clearing the display. This will have to be connected to the designated pin on the FPGA.
- Pin 3: Contrast (Vo) - Through the use of variable resistors, you can allow contrast adjustment or with normal resistors you can setup a static contrast.
- Pin 2: Power (Vdd) - In general the LCD will need to be connected to a 5 volts source but check your LCD specs.
- Pin 1: Ground (Vss) - This line should be connected to 0 volts. If you want to use the LCD for standard operation, I would recommend that you not confuse Vdd and Vss. If you do, the LCD will get extremely hot.
- Pins 7 through 14: Data lines - Data lines of the LCD can be connected directly to the 68000 bus, however if you are planning to read from the LCD you will need to run the data lines through a bidirectiona, bus driver (TTL 74245). If you want your LCD at an even address you will need to connect the data lines to d8 through d15 of the 68000, for an odd address you will have to connect the data lines to d0 through d7.
- Pin 6 : LCD enable line - The enable line of the LCD should only be raised after the address decoding and 68000 acknowledge cycle.
- Pin 5: Read/Write* line (R/W*) - The read/write line of the LCD can be connected directly to the read/write line of the 68000.
- Pin 4: Register Select (RS) - The register select line of the LCD should be connected to address line A1 of the 68000. When writing to the LCD you will use an offset of 2 from the base address for the character register and just the base address for the control register.
- Pin 3: Contrast (Vo) - Through the use of variable resistors, you can allow contrast adjustment or with normal resistors you can setup a static contrast.
- Pin 2: Power (Vdd) - This can be connected to one of the power lines on the 68000 bus.
- Pin 1: Ground (Vss) - This line should be connected to 0 volts. If you want to use the LCD for standard operation, I would recommend that you not confuse Vdd and Vss. If you do, the LCD will get extremely hot.
The LCD specifies that an MPU (microprocessor unit) is required. This is not the case, for testing purposes I hooked the LCD up to switches on a prototype board ( I would be the first to admit this is not the fastest way to write to the LCD ). I have used an LCD in both a MC 68000 and a FPGA project, discuss circuits required in each case.
FPGA
Connecting a LCD to a FPGA is relatively simple
providing that the FPGA has been programmed correctly. When connecting to an FPGA,
you must insure that the FPGA can provide the required voltage and current to run the
LCD. If the FPGA meets the power requirements then the LCD can be connected to
the designated pins on the FPGA. There are many ways to connect a LCD to an FPGA, in
the documented case there is no data bus or address decoding.
A sample circuit of the contrast circuit is given in the next section.
MC 68000
When connecting a LCD to the 68000, power requirements should not be a
big concern. However, since there will be other peripheral on the 68000 bus (VMEBUS)
there is a need to perform address decoding.
Contrast Control
Contast is fairly simple, just your basic voltage divider. If Vo
is grounded then the contrast is dark and if Vo is five volts then the contrast is
light. The circuit below gives a circuit that allows for adjustable contrast.
Some of the commonly used LCD Commands
LCD Control Commands
The following control commands require that the register select line is
low.
Function Set : %00111000 : $38 :
Sets the LCD for 2 line display.
Home Cursor : %00000001 : $01 : Moves the cursor to
the home position
Clear Display : %00000010 : $02 : Clears the display
ram.
Cursor Mode : %00000110 : $06 : Set cursor to
increment on write and turn off screen shift.
Cursor: :
%00001111: $0f : Enable cursor, make cursor visible, and make
cursor blinking block
Switch Location: %1xxxxxxx: $xx : Last seven bits indicate new
cursor position. $c0 places cursor at beginning of the second line
LCD Character Commands
All character commands require that the register select line is
high. Most standard ASCII characters can be written to the LCD, if a character
is not recognized by the LCD it will come out as a solid block.