--      
-- This is a connection component for the
-- RPB and connects fpga1 to the LEDs
-- CMC 96
-- Altered by Ray Still and Shazia Mardhani 1997
-- U of A

Library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity fpga2 is
        port (num: in STD_LOGIC_VECTOR (11 downto 0);
              
              LED0 : out std_logic;
              LED6, LED9, LED12, LED13: out STD_LOGIC;
              LED1, LED2, LED3: out STD_LOGIC;
              LED4, LED5, LED7, LED8, LED10, LED11: out STD_LOGIC);
end fpga2; 

architecture CONNECTION of fpga2 is
begin
    LED0 <= num(0);
    LED1 <= num(1);
    LED2 <= num(2);
    LED3 <= num(3);
    LED4 <= num(4);
    LED5 <= num(5);
    LED6 <= num(6);
    LED7 <= num(7);
    LED8 <= num(8);
    LED9 <= num(9);
    LED10 <= num(10);
    LED11 <= num(11);
    LED12 <= '0';  
    LED13 <= '0'; 
end CONNECTION;