---------------------------------------------------------------------
-- Base station Frame analyzer
-- Author   : Ai Hua
-- Date     : March 30, 2001
-- Filename : base_frame_analyzer.vhd
-- Architecture : Behavioral
-- Description  : This entity is to analyse the frame recieved
--                reconstruct the reply frame and send out to 
--                display. It's controlled by clock master.
---------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
library work;
use work.CDMA_pkg.all;

entity base_frame_analyzer is
	generic ( 
		datawidth : positive := 8;
		frame_length : positive := 12
	);
	port (
		resetn, clock : in std_logic;
		input_clk_en, frame_clk_en, output_clk_en : in std_logic;

        bitstream_in : in std_logic;
		usr_data : out std_logic_vector(frame_length-1 downto 0)
	);
end entity base_frame_analyzer;


architecture behavioral of base_frame_analyzer is

	signal temp_q : std_logic_vector(frame_length-1 downto 0);
	signal temp_frame_in : std_logic_vector(frame_length-1 downto 0);
	signal temp_frame_back : std_logic_vector(frame_length-1 downto 0);
	signal type_of_frame : std_logic_vector(3 downto 0);
	signal type_of_frameback : std_logic_vector(3 downto 0);

	TYPE ACK_response_state IS (waiting , not_recieved, recieved);
	SIGNAL ACK_state : ACK_response_state;

begin

Serial_To_Paralle : process (clock)
	begin
		wait until clock'event and clock = '1';
		if resetn = '0' then
			temp_q <= (others => '0');
		else
			if input_clk_en = '1' then
				temp_q <= temp_q(frame_length-2 downto 0) & bitstream_in;
			else
				temp_q <= temp_q;
			end if;
		end if;
	end process;


To_Recieve_frame : myflipflops
	generic map (datawidth => frame_length)
    port map ( 
		clk => clock,
		enable => frame_clk_en,
        clearn => resetn,

        d => temp_q, 
        q => temp_frame_in
    );


sent_to_LCD : myflipflops
	generic map (datawidth => frame_length)
    port map ( 
		clk 	=> clock,
		enable	=> output_clk_en, -- active high 
        clearn 	=> resetn,   -- active low reset

        d 		=> temp_frame_back, 
        q 		=> usr_data
    );

	type_of_frame <= temp_frame_in(frame_length-1 downto datawidth);

	with type_of_frame select
		type_of_frameback <= "1100" when "0011",
							 "0101" when "1010",
							 "0000" when others;

	temp_frame_back <= type_of_frameback & temp_frame_in(datawidth-1 downto 0);

end behavioral;