-- Interactive Audio Manipulation Processor
--
-- file: bidir.vhd
-- status: not compiled
--
-- author: Stephen Tang, modified from code supplied on Altera's
--   web site,
--   URL http://www.altera.com/html/atlas/examples/vhdl/v_bidir.html
--
-- The code has been modified to have a different bus width, and the
-- signal 'a' has been added to the sensitivity list of the second
-- process in order to correct a bug in the operation of the original
-- code.
-- Also, the input and output DFFs have been removed to make it into an
-- asynchronous circuit.
--
-- This entity defines a bidirectional bus. See the app note at
-- http://www.ee.ualberta.ca/~elliott/ee552/studentAppNotes/
--   2000_w/interfacing/bi_direction_bus/bidir_bus.html
-- for a description of it's operation.

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

library work;
use work.Constants_Pkg.all;

ENTITY bidir IS
    PORT(
        bidir   : INOUT STD_LOGIC_VECTOR (RAM_DATA_WIDTH-1 DOWNTO 0);
        oe, clk : IN STD_LOGIC;
        inp     : IN STD_LOGIC_VECTOR (RAM_DATA_WIDTH-1 DOWNTO 0);
        outp    : OUT STD_LOGIC_VECTOR (RAM_DATA_WIDTH-1 DOWNTO 0));
END bidir;

ARCHITECTURE maxpld OF bidir IS
BEGIN
    PROCESS (oe, bidir,inp)      -- Behavioral representation 
        BEGIN                    -- of tri-states.
        IF( oe = '0') THEN
            bidir <= (others => 'Z');--"ZZZZZZZZ";
            outp <= bidir;
        ELSE
            bidir <= inp; 
            outp <= bidir;
        END IF;
    END PROCESS;
END maxpld;