Keypad Module
The keypad interface module takes care of user input from the external keypad, and converts the input into a form (binary) that can be used by the arithmetic logic. The module then sends this data to the Matrix Arithmetic Logic Unit.
Data Path
The keypad has 8 output lines. The first four bits of the keypad output lines represent the columns, while the next four represent the rows. The rows of the keypad are held high, while the columns are low. When a key is pressed, the corresponding row signal is asserted low. Likewise, the corresponding column signal is asserted high. Therefore, each key pressed has a unique combination of row-column signals. The keypad circuitry is illustrated in figure 4.
Figure 4 - Keypad Circuitry
The possible values on the keypad lines, and how they are interpreted by the system, are given in table 1 below.
Output value on Key Pad Lines |
Key Pad Output in Hexadecimal |
BCD Value |
Hexadecimal Value |
Represents |
00001111 |
0F |
- |
No key pressed |
|
10000111 |
87 |
0000 |
0 |
0 |
01000111 |
47 |
0001 |
1 |
1 |
00100111 |
27 |
0010 |
2 |
2 |
00010111 |
17 |
0011 |
3 |
3 |
10001011 |
8B |
0100 |
4 |
4 |
01001011 |
4B |
0101 |
5 |
5 |
00101011 |
2B |
0110 |
6 |
6 |
00011011 |
1B |
0111 |
7 |
7 |
10001101 |
8D |
1000 |
8 |
8 |
01001101 |
4D |
1001 |
9 |
9 |
00101101 |
2D |
1010 |
A |
+ |
00011101 |
1D |
1011 |
B |
- |
10001110 |
8E |
1100 |
C |
* |
01001110 |
4E |
1101 |
D |
Enter |
00101110 |
2E |
1110 |
E |
Edit A |
00011110 |
1E |
1111 |
F |
Edit B |
Table 1 - Interpretation of signals from keypad output lines
Data Translation
Translation of the input from the keypad data lines involves the following steps:
Keypad Input Concatenation
The separate key presses must be concatenated into one entry. For example, to input the number 123, the user will press 1, followed by 2 and 3 on the keypad, and finally press ENTER. The system should recognize the number as 123, and not three separate numbers. This is implemented using a state machine, which stores each key-press data coming from the keypad into four separate registers. These registers are combined into a modified shift register when the ENTER key is received. This procedure is illustrated in figure 5 below.
Each register (first - fourth) is shifted into different positions depending on how many digits have been pressed before the ENTER key is pressed. The positions are shown in bold numbers in Figure 5 above. The relative positions are given in table 2 below.
| Register | Position when ENTER pressed after 1 digit |
Position when ENTER pressed after 2 digits |
Position when ENTER pressed after 3 digits |
Position when ENTER pressed after 4 digits |
First |
1 |
2 |
3 |
4 |
Second |
2 |
1 |
2 |
3 |
Third |
3 |
3 |
1 |
2 |
Fourth |
4 |
4 |
4 |
1 |
Converting Concatenated Data Into Binary
After concatenation, the input is in BCD form, but must be converted to binary for the purpose of arithmetic calculations. The concatenated data is fed into a BCD to Binary Converter, which takes data in parallel. The converter was designed around the algorithm described in "Serial Code Conversion between BCD and Binary" found on Xilinx' web page. The conversion is performed using a modified shift register that moves the data right, successively halving its contents. The serial output is then inputted into the serial to parallel converter, which is implemented as a conventional shift register. The serial to parallel converter outputs a DONE signal when the MSB bit has been received from the BCD to binary converter. The conversion ends when all bits of the binary input have been entered, at which time, the binary result is available in parallel form.
The whole procedure is summarized in figure 6.
