-- $Log: bfcounter.vhd,v $
-- Revision 1.5  1998/11/26 21:44:49  khackett
-- Final comment revision.
--
-- Revision 1.4  1998/11/20 02:41:56  scaplan
-- Cleaned DOS ^M's that had gotten tagged along in last revision.
--
-- Revision 1.2  1998/11/11 07:15:45  khackett
-- Compiled, simulated, and commented.
--
-- Revision 1.1  1998/10/25 01:51:54  psomogyi
-- initial revision.
--
--

library ieee; 
use ieee.std_logic_1164.all; 
use ieee.std_logic_arith.all; 
use ieee.std_logic_unsigned.all; 


entity bfcounter is
	generic (
		counter_width : positive := 5
	);

	port (
		clk : in std_logic;		-- clock
		reset : in std_logic;		-- reset
		enable : in std_logic;
		up_down : in std_logic;		-- 0 = count up, 1 = count down

		count : out std_logic_vector(counter_width-1 downto 0)
	);
end entity bfcounter;


architecture behavioural of bfcounter is

-------------------------------------------------------------------------------
-- The signal n is used as the number by which the clock is incremented or
-- decremented.
-------------------------------------------------------------------------------

signal n : std_logic_vector(counter_width-1 downto 0);

begin

-------------------------------------------------------------------------------
-- The signal n is read as count so that it can be implemented into other
-- architectures (ie. bf_enc and, hence, blowfish).
-------------------------------------------------------------------------------

count <= n;

counting : process (clk)

begin
	if rising_edge(clk) then
		if reset = '1' then
			if up_down = '0' then
				n <= "00000";	
			else
				n <= "10001";
			end if;
		elsif enable = '1' then
			if up_down = '0' then
				n <= n + 1;
			else
				n <= n - 1;
			end if;
		end if;
	end if;	
end process counting;

end behavioural;