EE 453 Integrated Circuit Design

Winter Term (2012w) last updated 2012-1-23

Course web page: http://www.ece.ualberta.ca/~elliott/ee453/

Course	Resources
Calendar Description	Library
Marking	Textbook
Labs and term work	Lecture Notes
General Course Info
	Alberta Innovates Scholarship: Feb 3, research plan, transcripts, 2 references, $26,500/year
Lecture notes	NSERC Scholarship: end of Sept. research plan, transcripts, 2 references

Lab and course announcements can be found here (and optionally delivered to your email).
Questions can be posted here. If you know the answer to a question (a difficulty, not a marked course component), by all means post it. Please read prior postings to see if your question has been asked and answered. Create a new topic for most questions (unless it's a request for elaboration).
Use email for questions of a confidential nature.

Professor	Duncan Elliott	492-5357	ECERF W2-045
Lab instructor	Russell Dodd

General Course Info

Lectures MWF 13:00-13:50 in ETLC e1-008

Labs Tues. 14:00-16:50 in ETLC e5-013 on scheduled dates.
CAD lab ETLC e5-013 is open extended hours, use your AICT (campus computer) userid

Office hours

Prerequisites: EE 351 and (co-requisite) CMPE 480 or consent of instructor

Outline

Review of Static CMOS Circuits
IC Process Technology
Parameter extraction and performance estimation
IC Layout, including transistor sizing and Logical Effort
Review Logic Circuit Families, Memories
Synchronous Systems, Clocking and Clock Distribution
?? Extreme circuits (pushing the power and speed envelope)

(ask more questions and we'll cover less material but in greater depth)

Marking

Tentative Marking scheme for EE 453.

Items [that were] denoted with ?? are tentative and are to be decided by majority vote in class by deadlines set by instructor.
Bonuses may be available on some marked materials.

Term work	15%	Problem Sets or Quizzes on Fridays
Labs	45%	Held Tuesdays Starting Jan. 10, 2010
Final Exam	40%	??4 aid sheets 8.5x11 inch, hand written, any information 3 hours - scheduled by registrar's office

Problem sets are due at the beginning of the lecture before being solved in class. Mutually beneficial collaboration is encouraged, provided that the names of all collaborators are cited on the problem set, immediately below the student's name. Marking will be based on effort. Please do not put student id numbers on problem sets or any other materials to be handed out in class.

Quizzes will be held unannounced at the beginning of selected lectures where problem sets are due. The only aids are the student's own problem set and a calculator. Individual work is expected.

Lab requirements are explained on the lab pages. Labs 1 and 2 are individual work. Lab 3 can be done individually or in groups of 2. The newsgroup can be used to share tricks about using the CAD tools. Verbal discussions among classmates are encouraged, but no lab information should be shared in paper, electronic or equivalent form.

Past handouts, etc. can be picked up from a box on the shelf opposite ECERF room w2-065. Walk through ECE reception, jog left and the shelves will be on your right.

Submissions will not normally be re-graded more than two weeks after the first day these have been returned in class.

The following calculators are permitted for examinations in this course: faculty approved programmable calculators, faculty approved non-programmable calculators, instructor approved calculators, slide rules, and instructor approved abacuses (if used quietly). Programmable calculators will probably offer little or no advantage over non-programmable calculators. Students must not distract other students during exams, so please turn off the calculator beep.

The final examination aid sheets must be in the student’s own handwriting (both sides, no photocopies or printouts), may be no larger than 21.59 by 27.94 cm paper, and may contain any information.

Deferred examinations and Re-examinations may contain multiple components (including an oral component) as designed by instructor.

Credit may only be received for one of EE453, ECE553, EE483 and EE653.

Students requiring specialized support should provide letters from SSDS to the instructor in the first 2 weeks of lectures.

Grade Determination Method

In this course, raw marks will be calculated up until after the final exam. The resulting overall percentage mark will then be converted for each student to a letter grade. A standard expected distribution of grades, which is provided by the Faculty of Engineering, will be used as a rough guideline when mapping overall marks to grades. Absolute merit of the work will also be taken into consideration.

Code of Student Behaviour

The University of Alberta is committed to the highest standards of academic integrity and honesty. Students are expected to be familiar with these standards regarding academic honesty and to uphold the policies of the University in this respect. Students are particularly urged to familiarize themselves with the provisions of the Code of Student Behavior (online at http://www.ualberta.ca/secretariat/appeals.htm ) and avoid any behavior that could potentially result in suspicions of cheating, plagiarism, misrepresentation of facts and/or participation in an offence. Academic dishonesty is a serious offence and can result in suspension or expulsion from the University.

Policy about course outlines can be found in §23.4(2) of the University Calendar.

Textbook

CMOS VLSI Design - A Circuits and Design Perspective, 4rd Edition
N.H.E. Weste & D. Harris
Addison-Wesley 2011
http://www3.hmc.edu/~harris/cmosvlsi/4e/index.html including selected problem solutions

Lecture Notes

The most important material will be covered on the white board. Please ensure you have a complete set of notes.
Selected lecture notes will be made available online one week after the lecture. A preliminary version may be available beforehand.
Use your ccic (Campus Computer ID) to access course materials.

Labs

Several labs will start with a ~10 minute demo that will help clarify what you'll be doing with the CAD tools.
You may be required to demonstrate your work to a lab TA in a scheduled lab.
Use your ccic (Campus Computer ID) to access course materials.

Lab handouts and schedule are available on Moodle.

Term Work

updated ~weekly

PS	Due	Assignment	Solutions
1	Jan 20	past 351 exam	online
2	Jan 27	CMOS & Sticks	in class
3	Feb 3	CMOS Latchup