1.0 Abstract

This application note details the procedure for exporting MicroBlaze projects created in Xilinx Platform Studio (XPS) to the Integrated Software Environment (ISE).

1.1 Background Information

There are two basic techniques for the integration of custom IP cores to a complete system-on-a-chip (SoC) using the MicroBlaze as the core processor. The first method involves the addition of custom IP modules through the peripheral wizard in XPS, the other method involves exporting the MicroBlaze system to ISE and manually adding custom IP modules.

1.2 Peripheral Wizard

Although the peripheral wizard tool is easy to use and abstracts the developer from the details of the system it inhibits the development of more complicated designs. The peripheral wizard is accessed through the menu system in XPS; “Tools->Import Peripheral Wizard…”.

Figure 1. Periperal Wizard Menu Option

The peripheral wizard allows for the creation of a template for new peripherals and for the addition of existing peripherals. When peripherals are created and imported into an existing projected they stored in the project directory in the “pcores” folder. The peripheral wizard will also automatically generate the *.pao (Peripheral Analyze Order) and *.mpd (Microprocessor Peripheral Definition) files required by XPS. When importing peripherals using the wizard it must be noted that the MicroBlaze is on the top-level. New peripheral cores generated are automatically linked to XPS and are added to the system through the add\edit cores menu option. XPS may need to be closed and restarted for new cores to appear.

1.3 Export to ISE

A more advanced technique for the development of MicroBlaze based systems is to export the initial MicroBlaze design from XPS to ISE. This method gives the developer complete control over design elements that are normally abstracted when using XPS. The other advantage of this method is that the MicroBlaze may be exported as a sublevel module.

The options for exporting a project to ISE are located in the Hierarchy and Flow Tab in the Options->Project Options menu selection.

Figure 2. XPS Project Options

To export the XPS project as a sub-module click the “This is a sub-module in my design” radio button. The Top Instance text box selection is used to name the top-level instance of the MicroBlaze system that is exported (this is not the name of your top-level system - remember that VHDL is case insensitive). To select ISE as the implementation tool click the ISE (ProjNav) radio button. If the design is to be exported to an existing ISE project check the “Add modules to existing NPL project” checkbox. The NPL file text box is used to point to the directory where the new NPL project is too be generated or where the existing project exists. When generating a new project XPS automatically creates a top-level file named “system_stub.vhd” for the new project. The MicroBlaze will be instantiated at this top-level and will be named according to the top instance name entered.

Figure 3. Export Menu Option

To export to ISE simply select the “Export to ProjNav” menu item in the Tools menu. It is noted that the “system_stub.vhd” is stored in the “hdl” directory. It is recommended that the developer make a copy of system_stub in another working directory, since further exports will cause this file to be overwritten. The developer may open the *.npl file created using the ISE Project Navigator for further system integration.

1.4 Importing the Bit Stream

Once a hardware bit stream has been created using ISE, it must be imported back into XPS so that the software bit stream can be appended. This is achieved through the “Import from ProjNav” option in the tools menu item (Figure 3). When the import option is selected the user is prompted for the BIT file and BMM file as below:

Figure 4. Import from ProjNav

If a new ISE project was created the BIT file will be located in the projnav directory and named “sytem_stub.bit”. The BMM file describes the BlockRAM Memory Map and is located in the “implementation” directory. Select the “system_stub_bd.bmm” file which contains the BlockRAM Memory Map with the placed information (i.e. “PLACED = X1Y7”) generated from place & route. The bit stream can than be updated with the MicroBlaze source code by selecting update bit stream. The newly generate BIT file (“download.bit”) can then be downloaded to the Multimedia Board using the download option in XPS or the Configure Device (iMPACT) option in ISE.