The Computer Architecture Discussion Group will discuss one paper on Tuesday, 
Oct.01, CME 345, 9:30.
All curious soles are welcome. [-de]

You can find paper at:
http://www.ee.ualberta.ca/~elliott/ee710/seminars/2002f/2002-10-01/

The Optimum Pipeline Depth for a Microprocessor

ABSTRACT

The impact of pipeline length on the performance of a
microprocessor is explored both theoretically and by
simulation. An analytical theory is presented that shows
two opposing architectural parameters affect the optimal
pipeline length: the degree of instruction level parallelism
(superscalar) decreases the optimal pipeline length, while
the lack of pipeline stalls increases the optimal pipeline
length. This theory is tested by analyzing the optimal
pipeline length for 35 applications representing three
classes of workloads. Trace tapes are collected from
SPEC95 and SPEC2000 applications, traditional (legacy)
database and on-line transaction processing (OLTP)
applications, and modern (e. g. web) applications primarily
written in Java and C++. The results show that there is a
clear and significant difference in the optimal pipeline
length between the SPEC workloads and both the legacy
and modern applications. The SPEC applications, written
in C, optimize to a shorter pipeline length than the legacy
applications, largely written in assembler language, with
relatively little overlap in the two distributions.
Additionally, the optimal pipeline length distribution for the
C++ and Java workloads overlaps with the legacy
applications, suggesting similar workload characteristics.
These results are explored across a wide range of
superscalar processors, both in-order and out-of-order.

International Conference on Computer Architecture (2002)
SESSION: Session 1: Processor pipelines

Authors
A. Hartstein and Thomas R. Puzak
IBM- T. J. Watson Research Center
Yorktown Heights, NY 10598

Pages: 7 - 13  Series-Proceeding-Section-Article 
Year of Publication: 2002 
ISBN ~ ISSN:1063-6897 , 0-7695-1605-X


regards
--
Fang Pang, MENG
Dept. of Electrical and Computer Engineering 
University of Alberta  fpang@ee.ualberta.ca
Edmonton, AB, Canada T6G 2V4