| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| NIOSII|unnamed_reset_clk_0_domain_synch |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_timer_0 |
23 |
0 |
0 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_timer_0_s1 |
81 |
0 |
18 |
0 |
44 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_sysid |
3 |
13 |
1 |
13 |
32 |
13 |
13 |
13 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_sysid_control_slave |
63 |
0 |
2 |
0 |
39 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_switch |
5 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_switch_s1 |
32 |
0 |
2 |
0 |
9 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_sdram_0|the_sdram_0_input_efifo_module |
47 |
2 |
0 |
2 |
47 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_sdram_0 |
47 |
1 |
1 |
1 |
40 |
1 |
1 |
1 |
16 |
0 |
0 |
0 |
0 |
| NIOSII|the_sdram_0_s1|rdv_fifo_for_cpu_0_instruction_master_to_sdram_0_s1 |
7 |
4 |
0 |
4 |
4 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_sdram_0_s1|rdv_fifo_for_cpu_0_data_master_to_sdram_0_s1 |
7 |
4 |
0 |
4 |
4 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_sdram_0_s1 |
103 |
0 |
6 |
0 |
76 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_onchip_memory2_0|the_altsyncram|auto_generated |
51 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_onchip_memory2_0 |
53 |
0 |
1 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_onchip_memory2_0_s1 |
128 |
1 |
4 |
1 |
94 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|wr_ptr |
4 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|rd_ptr_count |
4 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|FIFOram|altsyncram1 |
24 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|FIFOram |
24 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|fifo_state|count_usedw |
5 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|fifo_state |
5 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo |
13 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r|rfifo|auto_generated |
12 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_r |
13 |
0 |
1 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|wr_ptr |
4 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|rd_ptr_count |
4 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|FIFOram|altsyncram1 |
24 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|FIFOram |
24 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|fifo_state|count_usedw |
5 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|fifo_state |
5 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo |
13 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w|wfifo|auto_generated |
12 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0|the_jtag_uart_0_scfifo_w |
12 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0 |
38 |
9 |
23 |
9 |
36 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_jtag_uart_0_avalon_jtag_slave |
100 |
2 |
2 |
2 |
78 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_green_leds |
14 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_green_leds_s1 |
76 |
0 |
29 |
0 |
26 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_epcs_flash_controller_0|the_boot_copier_rom|auto_generated |
9 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_epcs_flash_controller_0|the_epcs_flash_controller_0_sub |
25 |
0 |
0 |
0 |
23 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_epcs_flash_controller_0 |
47 |
0 |
16 |
0 |
39 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_epcs_flash_controller_0_epcs_control_port |
127 |
3 |
4 |
3 |
90 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_jtag_debug_module_wrapper|the_cpu_0_jtag_debug_module_sysclk |
43 |
0 |
0 |
0 |
51 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_jtag_debug_module_wrapper|the_cpu_0_jtag_debug_module_tck |
130 |
1 |
1 |
1 |
43 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_jtag_debug_module_wrapper |
123 |
0 |
0 |
0 |
53 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_im|cpu_0_traceram_lpm_dram_bdp_component|the_altsyncram|auto_generated |
92 |
0 |
0 |
0 |
72 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_im|cpu_0_traceram_lpm_dram_bdp_component |
92 |
74 |
0 |
74 |
72 |
74 |
74 |
74 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_im |
97 |
36 |
17 |
36 |
48 |
36 |
36 |
36 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_pib |
39 |
20 |
38 |
20 |
19 |
20 |
20 |
20 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|the_cpu_0_oci_test_bench |
36 |
0 |
36 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|cpu_0_nios2_oci_fifocount_inc_fifocount |
5 |
0 |
0 |
0 |
5 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|cpu_0_nios2_oci_fifowp_inc_fifowp |
4 |
4 |
0 |
4 |
4 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|cpu_0_nios2_oci_compute_tm_count_tm_count |
3 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo |
151 |
0 |
65 |
0 |
36 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_dtrace|cpu_0_nios2_oci_trc_ctrl_td_mode |
9 |
4 |
6 |
4 |
4 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_dtrace |
112 |
0 |
101 |
0 |
72 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_itrace |
25 |
17 |
23 |
17 |
87 |
17 |
17 |
17 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_dbrk |
97 |
1 |
0 |
1 |
101 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_xbrk |
63 |
5 |
60 |
5 |
6 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_break |
52 |
36 |
6 |
36 |
71 |
36 |
36 |
36 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_avalon_reg |
49 |
0 |
28 |
0 |
68 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component|the_altsyncram|auto_generated |
90 |
0 |
0 |
0 |
64 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component |
90 |
2 |
0 |
2 |
64 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_ocimem |
93 |
0 |
6 |
0 |
64 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_debug |
50 |
1 |
30 |
1 |
7 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_nios2_oci |
176 |
28 |
0 |
28 |
68 |
28 |
28 |
28 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|cpu_0_register_bank_b|the_altsyncram|auto_generated |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|cpu_0_register_bank_b |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|cpu_0_register_bank_a|the_altsyncram|auto_generated |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|cpu_0_register_bank_a |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0|the_cpu_0_test_bench |
495 |
5 |
456 |
5 |
34 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0 |
149 |
2 |
28 |
2 |
127 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0_instruction_master |
164 |
0 |
6 |
0 |
62 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0_data_master |
460 |
28 |
34 |
28 |
111 |
28 |
28 |
28 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_cpu_0_jtag_debug_module |
130 |
0 |
4 |
0 |
92 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_altpll_0|sd1 |
3 |
4 |
0 |
4 |
6 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_altpll_0|stdsync2|dffpipe3 |
3 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_altpll_0|stdsync2 |
3 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_altpll_0 |
38 |
31 |
30 |
31 |
36 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_altpll_0_pll_slave |
96 |
0 |
2 |
0 |
74 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_Steering_PWM|steering_pwm |
22 |
0 |
0 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_Steering_PWM |
22 |
0 |
0 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_Steering_PWM_pwm |
71 |
0 |
3 |
0 |
44 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_RS_232_UART|the_RS_232_UART_regs |
41 |
13 |
6 |
13 |
43 |
13 |
13 |
13 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_RS_232_UART|the_RS_232_UART_rx|the_RS_232_UART_rx_stimulus_source |
17 |
0 |
16 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_RS_232_UART|the_RS_232_UART_rx |
19 |
2 |
0 |
2 |
13 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_RS_232_UART|the_RS_232_UART_tx |
27 |
1 |
0 |
1 |
4 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_RS_232_UART |
26 |
0 |
0 |
0 |
20 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_RS_232_UART_s1 |
82 |
2 |
18 |
2 |
48 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_Motor_PWM|motor_pwm |
22 |
0 |
0 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_Motor_PWM |
22 |
0 |
0 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_Motor_PWM_pwm |
71 |
0 |
3 |
0 |
44 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_GPIO_0 |
36 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII|the_GPIO_0_s1 |
63 |
0 |
2 |
0 |
40 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| NIOSII |
4 |
3 |
0 |
3 |
39 |
3 |
3 |
3 |
16 |
0 |
0 |
0 |
0 |