CMPE 401 - Computer Interfacing
Assignment #5
Due: In the CMPE 401 assignment box at 15:45 on Wednesday, Dec. 3,
2008
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Three 32-bit registers are used in the eTPU to configure the two time bases,
TCR1 and TCR2. These two clock signals are derived by dividing down
(i.e. prescaling) either the internal MCF5234 bus clock or the external
timing signal that is applied to the TCRCLK input pin. In your own words
briefly explain how the TCR1 signal is determined by bit settings
in the eTPU Time Base Configuration
Register (ETPU_TBCR), which is located at address IPSBAR + 0x1D_0020.
You do not have to repeat the explanation for TCR2.
Consult the MCF5235 Reference Manual to locate the relevant technical
information.
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In your own words briefly summarize the similarities and differences among:
(1) processor-memory busses, (2) input/output peripheral and instrument busses,
and (3) backplane busses.
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Briefly describe what is meant by a "split transaction" over a microcomputer bus.
How can split transactions help to speed up the performance of a microcomputer?
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In the case of the external MCF5234 system bus, briefly explain how the
Transfer Start (TS), Transfer In Progress (TIP), Transfer Acknowledge (TA) and
Transfer Error Acknowledge (TEA) are used during bus transactions.
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Briefly explain the difference between "cycle steal mode" and "continuous mode"
in the four channels of the DMA controller module. What factors should one
consider when choosing between these two modes?
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What aspects of the General-Purpose Interface Bus make it especially well
suited as an instrument bus? As part of your answer, briefly explain how the
3-way GPIB handshake works.
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Briefly describe how the initiator ready (IRDY) and target ready (TRDY)
signals are used together on the Peripheral Component Interconnct bus to
provide semisynchronous data transfers.