CMPE 401 - Computer Interfacing
Assignment #5
Not due anytime: for practice only
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Briefly explain the similarities and differences among (1) processor-memory busses,
(2) input/output peripheral and instrument bussesm, and (3) backplane busses.
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Briefly explain why modern personal computers have a hierarchy of busses of various
types instead of one simple system bus.
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How do read operations implemented as split transactions help speed up the performance
of a microcomputer?
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Briefly explain how an asynchronous bus attempts to combine the advantages of synchronous
busses and asynchronous busses, while avoiding their disadvantages.
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What are some possible benefits to having the data strobe (DS) and address strobe
(AS) signals in the 68000 bus?
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What is the purpose of the interrupt acknowledge (IACK) in the 68000 bus? How do
devices, other than the CPU, know when an IACK cycle is taking place? What should
those devices do when they have detected that an IACK cycle has started?
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What is direct memory access (DMA) and what advantages does it provide in computer
interfacing? What are some of the practical complications of DMA?
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With respect to the 68340 DMA bus protocol, why is there a need for both single-address
and two-address DMA bus operations? In which scenarios is each bus operation useful?
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What is the difference between "burst mode" and "cycle stealing" mode in the
68340 DMA bus protocol? How does a DMA controller request one mode instead of
the other?
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What aspects of the General-Purpose Interface Bus make it especially well suited
as an instrument bus? As part of your answer, briefly explain how the 3-way
GPIB handshake works.
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Briefly describe how the initiator ready (IRDY) and target ready (TRDY) signals are
used together on the Peripheral Component Interconnct bus to provide semisynchronous
data transfers.