CMPE 401 - Computer Interfacing

Assignment #2

Due: In the CMPE 401 assignment box at 15:45 on Wednesday, Oct. 19, 2005


  1. All of the microprocessors in the 68000 family require machine language instructions, data words and data long words to be "word-aligned" in memory. In other words, these three kinds of data objects must be stored in memory with the first occupied byte having an even address. Why do you think would be the most important advantage of adopting this constraint? What would be some potential disadvantages of this constraint?

  2. Briefly describe the difference between the LSR.W and ASR.W instructions. Be sure to explain how the condition code register bits are updated for each instruction. Now explain the difference between the LSL.B and ASL.B instructions.

  3. Consult the on-line documentation for the CPU32 and then briefly explain how the four table interpolation instructions work (i.e., TBLS, TBLSN, TBLU and TBLUN).

  4. Write an assembly language subroutine, called CASE_CHANGE, that receives two 32-bit pointers on the stack. These pointers point to the first and last bytes in a packed array of stored ASCII characters. CASE_CHANGE is to scan through the character array, and is to convert all upper case letters to lower case letters, and vice versa. All other ASCII codes in the array are to be left unchanged. The two pointers on the stack are not to be altered during the execution of the subroutine.

  5. Consider the design of an asynchronous serial interface (not RS232C). Each data frame is to consist of one stop bit, 1000 data bits, 10 bits for error detection and correction, and two stop bits. The transmitter and receiver circuits are to base their timing on 8-MHz crystal-stabilized oscillator circuits that are divided down in frequency by a factor of 16 to get the bit rate in the data frames. You are to assume that bits are recovered reliably at the receiver if the actual sampling point drifts by no more than 25% on either side (leading or lagging) of the ideal sampling point in the middle of each bit. More accurate crystals cost more than less accurate crystals, and your company wants to use the cheapest crystals that it can get away with. Determine the worst-case error that can be present in the raw oscillator frequencies while still ensuring reliable data recovery at the receiver.

  6. Write a short assembly language routine that initializes a DUART for normal duplex communications as follows. Both ports are to use busy waiting to synchronize the CPU with data communication over the A and B side ports. Port A is to carry 7-bit data, with even parity, at 9600 baud (bits/sec). Error indications are to be on a per-character basis. The CTS input is to automatically disable the port A transmitter. The port A RTS output function is to be disabled. Port B is to carry 8-bit data, with no parity, at 4800 baud. Error indications are to be formed over all characters in the receiver FIFO buffer. The CTS input is to have no automatic effect on the port A transmitter. However, the port A RTS output function is to be enabled. All DUART interrupts are to be disabled. In your answer, be sure to justify the bit patterns that are loaded into DUART command registers.