CMPE 401 - Computer Interfacing

Assignment #4

1. Design a task, written in ANSI C for the MicroC/OS-II environment, that starts off polling two 16-bit hardware register at addresses $AC3000 and $AC3002, respectively, sixteen times per second. This register records the present X and Y position coordinates of a mouse pointing device. If the mouse position has changed since the last polling operation, then the task is to obtain the system time (in ticks) and to post a message to a message queue that contains the system time along with the present X and Y positions of the mouse. In addition, the polling frequency is to be increased to 32 times per second immediately after a mouse movement has been detected. When the mouse position has not changed for three consecutive polling operations, the polling frequency is to be lowered back to 16 times per second. Your solution does not need to provide the MicroC/OS-II initialization code nor the start-up task. Assume that the system hardware timer produces 64 ticks per second.

2. Design a program in 68000 asssembly language that implements a circular buffer that has the capacity to store N long-word pointers, where N is a symbolic constant. The empty and full flags are to be implemented as byte-sized flags. The read and write pointers are to be implemented as 16-bit offsets. Provide separate routines for initializing the circular buffer, writing a pointer from the buffer, and reading a pointer from the buffer. The pointer parameters are to be passed in register A0. Be sure to exploit the available instruction types and addressing modes to make accesses to the circular buffer as fast as possible. Document your design with a diagram that shows the relevant data structures on a Motorola-style memory "ladder" diagram.

3. Lecture slide 10-7 contains two illustrations that show the internal structure of a hybrid stepper motor. Note that both the rotor and the stator are split into upper and lower halves. Assume, for the rest of this question, that the upper and lower halves are aligned with each other (and so we need only consider one set of halves). The left side of slide 10-7 shows a rotor with 10 teeth, which are labelled "a" to "j". The stator is shown with 8 teeth that are labelled as being of types 1, 1', 2 and 2'. There are in fact only two windings in the stator, which we will call #1 and #2. The labels 1 and 1' indicate that when winding #1 is energized, the stator teeth labelled 1 and 1' assume opposite magnetic polarities; similarly, energizing winding #2 causes the teeth labelled 2 and 2' to have opposite magnetic polarities. Reversing the direction of the current flowing through winding #1 will reverse the magnetic polarities of the stator teeth of types 1 and 1'. Reversing the current direction in winding #2 has the same effect on stator teeth of types 2 and 2'.
   1. The rotor shown at the left of slide 10-7 is shown with rotor teeth "a" and "f" aligned with stator teeth of type 1. The next rotational increment would have rotor teeth "b" and "g" aligned with stator teeth of type 2. Determine the rotational increment, in degrees, corresponding this one minimum-sized step. Be sure to show your intermediate work.
   2. Construct a table that has rows for the first ten angular rotor positions going clockwise assuming a full step control sequence. Additional columns of the table should show the corresponding rotor positions (in degrees with respect to the first position shown in slide 10-7) and the current strength and direction in the two stator windings.
   3. Construct the same type of table for the first ten angular rotor positions going counter-clockwise assuming a half step control sequence. What would be the minimum-sized rotational increment in rotor position?

4. Briefly describe how the TPU can be programmed to produce up to 16 different user interrupts. Which TPU registers are involved in interrupt control? Briefly describe how each of these registers is used. Where are the TPU exception vectors located in the exception vector table of the 68332 system? Note that once a TPU interrupt has occurred, the corresponding CISR bit must be written to 0 to clear the interrupt condition (it will not be cleared automatically by just reading the CISR).

5. Consult the course textbook and/or on-line TPU documentation and then briefly explain briefly, in your own words, how the pulse-width modulation (PWM) built-in function (code $9 in the channel function select registers) is used.